ppc4xx: Big cleanup of PPC4xx defines

[oweals/u-boot.git] / board / esd / canbt / canbt.c

diff --git a/board/esd/canbt/canbt.c b/board/esd/canbt/canbt.c
index 30fa605abb62ae5bce1468f7bc7b299d60c752a3..418d3e237edcee14762755adf27c1ac623f7670d 100644 (file)
--- a/board/esd/canbt/canbt.c
+++ b/board/esd/canbt/canbt.c
@@ -24,6 +24,7 @@
 #include <common.h>
 #include "canbt.h"
 #include <asm/processor.h>
+#include <asm/io.h>
 #include <command.h>
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -51,16 +52,16 @@ const unsigned char fpgadata[] = {
 
 int board_early_init_f (void)
 {
-       unsigned long cntrl0Reg;
+       unsigned long CPC0_CR0Reg;
        int index, len, i;
        int status;
 
        /*
         * Setup GPIO pins
         */
-       cntrl0Reg = mfdcr (cntrl0) & 0xf0001fff;
-       cntrl0Reg |= 0x0070f000;
-       mtdcr (cntrl0, cntrl0Reg);
+       CPC0_CR0Reg = mfdcr (CPC0_CR0) & 0xf0001fff;
+       CPC0_CR0Reg |= 0x0070f000;
+       mtdcr (CPC0_CR0, CPC0_CR0Reg);
 
 #ifdef FPGA_DEBUG
        /* set up serial port with default baudrate */
@@ -117,9 +118,9 @@ int board_early_init_f (void)
        /*
         * Setup port pins for normal operation
         */
-       out32 (GPIO0_ODR, 0x00000000);  /* no open drain pins */
-       out32 (GPIO0_TCR, 0x07038100);  /* setup for output */
-       out32 (GPIO0_OR, 0x07030100);   /* set output pins to high (default) */
+       out_be32 ((void *)GPIO0_ODR, 0x00000000);       /* no open drain pins */
+       out_be32 ((void *)GPIO0_TCR, 0x07038100);       /* setup for output */
+       out_be32 ((void *)GPIO0_OR, 0x07030100);        /* set output pins to high (default) */
 
        /*
         * IRQ 0-15  405GP internally generated; active high; level sensitive