#include <asm/io.h>
#include <asm/arch/sys_proto.h>
#include <i2c.h>
+#include <input.h>
#include <power/pmic.h>
#include <power/pfuze100_pmic.h>
#include <asm/arch/mx6-ddr.h>
add_board_boot_modes(board_boot_modes);
#endif
- setenv("board_name", BOARD_NAME);
+ env_set("board_name", BOARD_NAME);
return 0;
}
writel(0x000003FF, &ccm->CCGR6);
}
-static void gpr_init(void)
-{
- struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
-
- /* enable AXI cache for VDOA/VPU/IPU */
- writel(0xF00000CF, &iomux->gpr[4]);
- /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
- writel(0x007F007F, &iomux->gpr[6]);
- writel(0x007F007F, &iomux->gpr[7]);
-}
-
/*
* This section requires the differentiation between iMX6 Sabre boards, but
* for now, it will configure only for the mx6q variant.