* Copyright (C) 2008 Sekhar Nori, Texas Instruments, Inc. <nsekhar@ti.com>
* Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
* Copyright (C) 2004 Texas Instruments.
+ * Copyright (C) 2012 Sughosh Ganu <urwithsughosh@gmail.com>.
*
* ----------------------------------------------------------------------------
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ * SPDX-License-Identifier: GPL-2.0+
* ----------------------------------------------------------------------------
*/
#include <asm/io.h>
#include <asm/arch/davinci_misc.h>
#include <asm/arch/pinmux_defs.h>
+#include <asm/arch/da8xx-usb.h>
#include <ns16550.h>
DECLARE_GLOBAL_DATA_PTR;
return 0;
}
+
+int usb_phy_on(void)
+{
+ u32 timeout;
+ u32 cfgchip2;
+
+ cfgchip2 = readl(&davinci_syscfg_regs->cfgchip2);
+
+ cfgchip2 &= ~(CFGCHIP2_RESET | CFGCHIP2_PHYPWRDN | CFGCHIP2_OTGPWRDN |
+ CFGCHIP2_OTGMODE | CFGCHIP2_REFFREQ |
+ CFGCHIP2_USB1PHYCLKMUX);
+ cfgchip2 |= CFGCHIP2_SESENDEN | CFGCHIP2_VBDTCTEN | CFGCHIP2_PHY_PLLON |
+ CFGCHIP2_REFFREQ_24MHZ | CFGCHIP2_USB2PHYCLKMUX |
+ CFGCHIP2_USB1SUSPENDM;
+
+ writel(cfgchip2, &davinci_syscfg_regs->cfgchip2);
+
+ /* wait until the usb phy pll locks */
+ timeout = DA8XX_USB_OTG_TIMEOUT;
+ while (timeout--)
+ if (readl(&davinci_syscfg_regs->cfgchip2) & CFGCHIP2_PHYCLKGD)
+ return 1;
+
+ /* USB phy was not turned on */
+ return 0;
+}
+
+void usb_phy_off(void)
+{
+ u32 cfgchip2;
+
+ /*
+ * Power down the on-chip PHY.
+ */
+ cfgchip2 = readl(&davinci_syscfg_regs->cfgchip2);
+ cfgchip2 &= ~(CFGCHIP2_PHY_PLLON | CFGCHIP2_USB1SUSPENDM);
+ cfgchip2 |= CFGCHIP2_PHYPWRDN | CFGCHIP2_OTGPWRDN | CFGCHIP2_RESET;
+ writel(cfgchip2, &davinci_syscfg_regs->cfgchip2);
+}