Merge branch 'next' of git://git.denx.de/u-boot-mpc83xx

[oweals/u-boot.git] / board / davinci / da8xxevm / da850evm.c

diff --git a/board/davinci/da8xxevm/da850evm.c b/board/davinci/da8xxevm/da850evm.c
index 88337ffceb45522cace4f09ce421e15e1ddc2e55..85b483096b3b481c07e9509892d66f364896e7e0 100644 (file)
--- a/board/davinci/da8xxevm/da850evm.c
+++ b/board/davinci/da8xxevm/da850evm.c
@@ -6,19 +6,7 @@
  * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com>
  * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
  *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
@@ -335,10 +323,6 @@ int board_early_init_f(void)
 
 int board_init(void)
 {
-#ifdef CONFIG_USE_NOR
-       u32 val;
-#endif
-
 #ifndef CONFIG_USE_IRQ
        irq_init();
 #endif
@@ -348,11 +332,11 @@ int board_init(void)
         * NAND CS setup - cycle counts based on da850evm NAND timings in the
         * Linux kernel @ 25MHz EMIFA
         */
-       writel((DAVINCI_ABCR_WSETUP(0) |
-               DAVINCI_ABCR_WSTROBE(1) |
-               DAVINCI_ABCR_WHOLD(0) |
-               DAVINCI_ABCR_RSETUP(0) |
-               DAVINCI_ABCR_RSTROBE(1) |
+       writel((DAVINCI_ABCR_WSETUP(2) |
+               DAVINCI_ABCR_WSTROBE(2) |
+               DAVINCI_ABCR_WHOLD(1) |
+               DAVINCI_ABCR_RSETUP(1) |
+               DAVINCI_ABCR_RSTROBE(4) |
                DAVINCI_ABCR_RHOLD(0) |
                DAVINCI_ABCR_TA(1) |
                DAVINCI_ABCR_ASIZE_8BIT),
@@ -378,12 +362,18 @@ int board_init(void)
 
 #ifdef CONFIG_USE_NOR
        /* Set the GPIO direction as output */
-       clrbits_be32((u32 *)GPIO_BANK0_REG_DIR_ADDR, (0x01 << 11));
+       clrbits_le32((u32 *)GPIO_BANK0_REG_DIR_ADDR, (0x01 << 11));
 
        /* Set the output as low */
-       val = readl(GPIO_BANK0_REG_SET_ADDR);
-       val |= (0x01 << 11);
-       writel(val, GPIO_BANK0_REG_CLR_ADDR);
+       writel(0x01 << 11, GPIO_BANK0_REG_CLR_ADDR);
+#endif
+
+#ifdef CONFIG_DAVINCI_MMC
+       /* Set the GPIO direction as output */
+       clrbits_le32((u32 *)GPIO_BANK0_REG_DIR_ADDR, (0x01 << 11));
+
+       /* Set the output as high */
+       writel(0x01 << 11, GPIO_BANK0_REG_SET_ADDR);
 #endif
 
 #ifdef CONFIG_DRIVER_TI_EMAC