mflr r3 /* get address of ..getAddr */
/* Calculate number of cache lines for this function */
- addi r4, 0, (((.Lfe0 - ..getAddr) / CFG_CACHELINE_SIZE) + 2)
+ addi r4, 0, (((.Lfe0 - ..getAddr) / CONFIG_SYS_CACHELINE_SIZE) + 2)
mtctr r4
..ebcloop:
icbt r0, r3 /* prefetch cache line for addr in r3*/
- addi r3, r3, CFG_CACHELINE_SIZE /* move to next cache line */
+ addi r3, r3, CONFIG_SYS_CACHELINE_SIZE /* move to next cache line */
bdnz ..ebcloop /* continue for $CTR cache lines */
/********************************************************************
*******************************************************************/
/*WDCR_EBC(pb3ap, 0x07869200)*/
WDCR_EBC(pb3ap, 0x04055200)
- WDCR_EBC(pb3cr, 0xff01c000)
+ WDCR_EBC(pb3cr, 0xf081c000)
/********************************************************************
* Memory Bank 1,2,4-7 (Unused) initialization
*******************************************************************/