* Author: Fabio Estevam <fabio.estevam@freescale.com>
*/
+#include <command.h>
+#include <image.h>
+#include <init.h>
#include <asm/arch/clock.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/iomux.h>
#include <asm/gpio.h>
#include <asm/mach-imx/iomux-v3.h>
#include <asm/mach-imx/boot_mode.h>
-#include <asm/mach-imx/mxc_i2c.h>
#include <asm/mach-imx/video.h>
-#include <mmc.h>
-#include <fsl_esdhc_imx.h>
-#include <miiphy.h>
-#include <netdev.h>
-#include <asm/arch/mxc_hdmi.h>
#include <asm/arch/crm_regs.h>
-#include <linux/fb.h>
-#include <ipu_pixfmt.h>
-#include <input.h>
#include <asm/io.h>
#include <asm/arch/sys_proto.h>
-#include <pwm.h>
+#include <bmp_logo.h>
+#include <dm/root.h>
#include <env.h>
+#include <i2c_eeprom.h>
+#include <i2c.h>
#include <micrel.h>
-#include <spi.h>
-#include <video.h>
-#include <../drivers/video/imx/ipu.h>
-#if defined(CONFIG_VIDEO_BMP_LOGO)
- #include <bmp_logo.h>
-#endif
+#include <miiphy.h>
+#include <lcd.h>
+#include <led.h>
+#include <power/pmic.h>
+#include <power/regulator.h>
+#include <power/da9063_pmic.h>
+#include <splash.h>
+#include <video_fb.h>
DECLARE_GLOBAL_DATA_PTR;
-#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
- PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
- PAD_CTL_SRE_FAST | PAD_CTL_HYS)
-
-#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \
- PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \
- PAD_CTL_SRE_FAST | PAD_CTL_HYS)
-
-#define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
- PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
-
-#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \
- PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
-
-#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
- PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \
- PAD_CTL_ODE | PAD_CTL_SRE_FAST)
-
-#define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
-
-#define DISP_PAD_CTRL (0x10)
-
-#define ECSPI4_CS1 IMX_GPIO_NR(5, 2)
-
-#define USDHC2_PAD_CTRL (PAD_CTL_SPEED_LOW | \
- PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
-
-#if (CONFIG_SYS_BOARD_VERSION == 2)
- /* 4.3 display controller */
- #define ECSPI1_CS0 IMX_GPIO_NR(4, 9)
- #define ECSPI4_CS0 IMX_GPIO_NR(3, 29)
-#elif (CONFIG_SYS_BOARD_VERSION == 3)
- #define ECSPI1_CS0 IMX_GPIO_NR(2, 30) /* NOR flash */
- /* 4.3 display controller */
- #define ECSPI1_CS1 IMX_GPIO_NR(4, 10)
-#endif
-
-#define SOFT_RESET_GPIO IMX_GPIO_NR(7, 13)
-#define SD2_DRIVER_ENABLE IMX_GPIO_NR(7, 8)
-
-struct i2c_pads_info i2c_pad_info3 = {
- .scl = {
- .i2c_mode = MX6_PAD_GPIO_5__I2C3_SCL | PC,
- .gpio_mode = MX6_PAD_GPIO_5__GPIO1_IO05 | PC,
- .gp = IMX_GPIO_NR(1, 5)
- },
- .sda = {
- .i2c_mode = MX6_PAD_GPIO_6__I2C3_SDA | PC,
- .gpio_mode = MX6_PAD_GPIO_6__GPIO1_IO06 | PC,
- .gp = IMX_GPIO_NR(1, 6)
- }
-};
-
-struct i2c_pads_info i2c_pad_info4 = {
- .scl = {
- .i2c_mode = MX6_PAD_GPIO_7__I2C4_SCL | PC,
- .gpio_mode = MX6_PAD_GPIO_7__GPIO1_IO07 | PC,
- .gp = IMX_GPIO_NR(1, 7)
- },
- .sda = {
- .i2c_mode = MX6_PAD_GPIO_8__I2C4_SDA | PC,
- .gpio_mode = MX6_PAD_GPIO_8__GPIO1_IO08 | PC,
- .gp = IMX_GPIO_NR(1, 8)
- }
-};
-
-iomux_v3_cfg_t const uart1_pads[] = {
- MX6_PAD_CSI0_DAT10__UART1_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
- MX6_PAD_CSI0_DAT11__UART1_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
- MX6_PAD_EIM_D19__UART1_CTS_B | MUX_PAD_CTRL(UART_PAD_CTRL),
- MX6_PAD_EIM_D20__UART1_RTS_B | MUX_PAD_CTRL(UART_PAD_CTRL),
-};
-
-iomux_v3_cfg_t const uart2_pads[] = {
- MX6_PAD_EIM_D26__UART2_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
- MX6_PAD_EIM_D27__UART2_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
-};
-
-iomux_v3_cfg_t const uart3_pads[] = {
- MX6_PAD_EIM_D24__UART3_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
- MX6_PAD_EIM_D25__UART3_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
- MX6_PAD_EIM_D31__UART3_RTS_B | MUX_PAD_CTRL(UART_PAD_CTRL),
- MX6_PAD_EIM_D23__UART3_CTS_B | MUX_PAD_CTRL(UART_PAD_CTRL),
-};
-
-iomux_v3_cfg_t const uart4_pads[] = {
- MX6_PAD_KEY_COL0__UART4_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
- MX6_PAD_KEY_ROW0__UART4_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
-};
-
-iomux_v3_cfg_t const gpio_pads[] = {
- /* LED enable*/
- MX6_PAD_ENET_CRS_DV__GPIO1_IO25 | MUX_PAD_CTRL(NO_PAD_CTRL),
- /* LED yellow */
- MX6_PAD_NANDF_CS3__GPIO6_IO16 | MUX_PAD_CTRL(NO_PAD_CTRL),
- /* LED red */
-#if (CONFIG_SYS_BOARD_VERSION == 2)
- MX6_PAD_EIM_EB0__GPIO2_IO28 | MUX_PAD_CTRL(NO_PAD_CTRL),
-#elif (CONFIG_SYS_BOARD_VERSION == 3)
- MX6_PAD_EIM_WAIT__GPIO5_IO00 | MUX_PAD_CTRL(NO_PAD_CTRL),
-#endif
- /* LED green */
- MX6_PAD_EIM_A24__GPIO5_IO04 | MUX_PAD_CTRL(NO_PAD_CTRL),
- /* LED blue */
- MX6_PAD_EIM_EB1__GPIO2_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL),
- /* spi flash WP protect */
- MX6_PAD_SD4_DAT7__GPIO2_IO15 | MUX_PAD_CTRL(NO_PAD_CTRL),
- /* spi CS 0 */
- MX6_PAD_EIM_D29__GPIO3_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL),
- /* spi bus #2 SS driver enable */
- MX6_PAD_EIM_A23__GPIO6_IO06 | MUX_PAD_CTRL(NO_PAD_CTRL),
- /* RST_LOC# PHY reset input (has pull-down!)*/
- MX6_PAD_GPIO_18__GPIO7_IO13 | MUX_PAD_CTRL(NO_PAD_CTRL),
- /* SD 2 level shifter output enable */
- MX6_PAD_SD3_RST__GPIO7_IO08 | MUX_PAD_CTRL(NO_PAD_CTRL),
- /* SD1 card detect input */
- MX6_PAD_ENET_RXD0__GPIO1_IO27 | MUX_PAD_CTRL(NO_PAD_CTRL),
- /* SD1 write protect input */
- MX6_PAD_DI0_PIN4__GPIO4_IO20 | MUX_PAD_CTRL(NO_PAD_CTRL),
- /* SD2 card detect input */
- MX6_PAD_GPIO_19__GPIO4_IO05 | MUX_PAD_CTRL(NO_PAD_CTRL),
- /* SD2 write protect input */
- MX6_PAD_SD4_DAT2__GPIO2_IO10 | MUX_PAD_CTRL(NO_PAD_CTRL),
- /* Touchscreen IRQ */
- MX6_PAD_SD4_DAT1__GPIO2_IO09 | MUX_PAD_CTRL(NO_PAD_CTRL),
-};
-
-static iomux_v3_cfg_t const misc_pads[] = {
- /* USB_OTG_ID = GPIO1_24*/
- MX6_PAD_ENET_RX_ER__USB_OTG_ID | MUX_PAD_CTRL(NO_PAD_CTRL),
- /* H1 Power enable = GPIO1_0*/
- MX6_PAD_GPIO_0__USB_H1_PWR | MUX_PAD_CTRL(NO_PAD_CTRL),
- /* OTG Power enable = GPIO4_15*/
- MX6_PAD_KEY_ROW4__USB_OTG_PWR | MUX_PAD_CTRL(NO_PAD_CTRL),
-};
-
-iomux_v3_cfg_t const enet_pads[] = {
- MX6_PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_RGMII_TXC__RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_RGMII_TD0__RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_RGMII_TD1__RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_RGMII_TD2__RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_RGMII_TD3__RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_RGMII_TX_CTL__RGMII_TX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_ENET_REF_CLK__ENET_TX_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_RGMII_RXC__RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_RGMII_RD0__RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_RGMII_RD1__RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_RGMII_RD2__RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_RGMII_RD3__RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL),
- MX6_PAD_RGMII_RX_CTL__RGMII_RX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL),
-};
-
-static iomux_v3_cfg_t const backlight_pads[] = {
- /* backlight PWM brightness control */
- MX6_PAD_GPIO_9__PWM1_OUT | MUX_PAD_CTRL(NO_PAD_CTRL),
- /* backlight enable */
- MX6_PAD_EIM_BCLK__GPIO6_IO31 | MUX_PAD_CTRL(NO_PAD_CTRL),
- /* LCD power enable */
- MX6_PAD_NANDF_CS2__GPIO6_IO15 | MUX_PAD_CTRL(NO_PAD_CTRL),
-};
-
-static iomux_v3_cfg_t const ecspi1_pads[] = {
- MX6_PAD_EIM_D16__ECSPI1_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL),
- MX6_PAD_EIM_D17__ECSPI1_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL),
- MX6_PAD_EIM_D18__ECSPI1_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL),
-#if (CONFIG_SYS_BOARD_VERSION == 2)
- MX6_PAD_KEY_ROW1__GPIO4_IO09 | MUX_PAD_CTRL(SPI_PAD_CTRL),
-#elif (CONFIG_SYS_BOARD_VERSION == 3)
- MX6_PAD_EIM_EB2__GPIO2_IO30 | MUX_PAD_CTRL(SPI_PAD_CTRL),
- MX6_PAD_KEY_COL2__GPIO4_IO10 | MUX_PAD_CTRL(NO_PAD_CTRL),
-#endif
-};
-
-static void setup_iomux_enet(void)
-{
- imx_iomux_v3_setup_multiple_pads(enet_pads, ARRAY_SIZE(enet_pads));
-}
-
-#if (CONFIG_SYS_BOARD_VERSION == 2)
-iomux_v3_cfg_t const ecspi4_pads[] = {
- MX6_PAD_EIM_D21__ECSPI4_SCLK | MUX_PAD_CTRL(NO_PAD_CTRL),
- MX6_PAD_EIM_D22__ECSPI4_MISO | MUX_PAD_CTRL(NO_PAD_CTRL),
- MX6_PAD_EIM_D28__ECSPI4_MOSI | MUX_PAD_CTRL(NO_PAD_CTRL),
- MX6_PAD_EIM_A25__GPIO5_IO02 | MUX_PAD_CTRL(NO_PAD_CTRL),
- MX6_PAD_EIM_D29__GPIO3_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL),
-};
-#endif
-
-static iomux_v3_cfg_t const display_pads[] = {
- MX6_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK | MUX_PAD_CTRL(DISP_PAD_CTRL),
- MX6_PAD_DI0_PIN15__IPU1_DI0_PIN15,
- MX6_PAD_DI0_PIN2__IPU1_DI0_PIN02,
- MX6_PAD_DI0_PIN3__IPU1_DI0_PIN03,
- MX6_PAD_DISP0_DAT0__IPU1_DISP0_DATA00,
- MX6_PAD_DISP0_DAT1__IPU1_DISP0_DATA01,
- MX6_PAD_DISP0_DAT2__IPU1_DISP0_DATA02,
- MX6_PAD_DISP0_DAT3__IPU1_DISP0_DATA03,
- MX6_PAD_DISP0_DAT4__IPU1_DISP0_DATA04,
- MX6_PAD_DISP0_DAT5__IPU1_DISP0_DATA05,
- MX6_PAD_DISP0_DAT6__IPU1_DISP0_DATA06,
- MX6_PAD_DISP0_DAT7__IPU1_DISP0_DATA07,
- MX6_PAD_DISP0_DAT8__IPU1_DISP0_DATA08,
- MX6_PAD_DISP0_DAT9__IPU1_DISP0_DATA09,
- MX6_PAD_DISP0_DAT10__IPU1_DISP0_DATA10,
- MX6_PAD_DISP0_DAT11__IPU1_DISP0_DATA11,
- MX6_PAD_DISP0_DAT12__IPU1_DISP0_DATA12,
- MX6_PAD_DISP0_DAT13__IPU1_DISP0_DATA13,
- MX6_PAD_DISP0_DAT14__IPU1_DISP0_DATA14,
- MX6_PAD_DISP0_DAT15__IPU1_DISP0_DATA15,
- MX6_PAD_DISP0_DAT16__IPU1_DISP0_DATA16,
- MX6_PAD_DISP0_DAT17__IPU1_DISP0_DATA17,
- MX6_PAD_DISP0_DAT18__IPU1_DISP0_DATA18,
- MX6_PAD_DISP0_DAT19__IPU1_DISP0_DATA19,
- MX6_PAD_DISP0_DAT20__IPU1_DISP0_DATA20,
- MX6_PAD_DISP0_DAT21__IPU1_DISP0_DATA21,
- MX6_PAD_DISP0_DAT22__IPU1_DISP0_DATA22,
- MX6_PAD_DISP0_DAT23__IPU1_DISP0_DATA23,
+enum {
+ BOARD_TYPE_4 = 4,
+ BOARD_TYPE_7 = 7,
};
-int board_spi_cs_gpio(unsigned int bus, unsigned int cs)
-{
- if (bus == CONFIG_SF_DEFAULT_BUS && cs == CONFIG_SF_DEFAULT_CS)
-#if (CONFIG_SYS_BOARD_VERSION == 2)
- return IMX_GPIO_NR(5, 2);
-
- if (bus == 0 && cs == 0)
- return IMX_GPIO_NR(4, 9);
-#elif (CONFIG_SYS_BOARD_VERSION == 3)
- return ECSPI1_CS0;
-
- if (bus == 0 && cs == 1)
- return ECSPI1_CS1;
-#endif
- return -1;
-}
-
-static void setup_spi(void)
-{
- int i;
-
- imx_iomux_v3_setup_multiple_pads(ecspi1_pads, ARRAY_SIZE(ecspi1_pads));
-
-#if (CONFIG_SYS_BOARD_VERSION == 2)
- imx_iomux_v3_setup_multiple_pads(ecspi4_pads, ARRAY_SIZE(ecspi4_pads));
-#endif
-
- for (i = 0; i < 4; i++)
- enable_spi_clk(true, i);
-
- gpio_direction_output(ECSPI1_CS0, 1);
-#if (CONFIG_SYS_BOARD_VERSION == 2)
- gpio_direction_output(ECSPI4_CS1, 0);
- /* set cs0 to high (second device on spi bus #4) */
- gpio_direction_output(ECSPI4_CS0, 1);
-#elif (CONFIG_SYS_BOARD_VERSION == 3)
- gpio_direction_output(ECSPI1_CS1, 1);
-#endif
-}
-
-static void setup_iomux_uart(void)
-{
- switch (CONFIG_MXC_UART_BASE) {
- case UART1_BASE:
- imx_iomux_v3_setup_multiple_pads(uart1_pads,
- ARRAY_SIZE(uart1_pads));
- break;
- case UART2_BASE:
- imx_iomux_v3_setup_multiple_pads(uart2_pads,
- ARRAY_SIZE(uart2_pads));
- break;
- case UART3_BASE:
- imx_iomux_v3_setup_multiple_pads(uart3_pads,
- ARRAY_SIZE(uart3_pads));
- break;
- case UART4_BASE:
- imx_iomux_v3_setup_multiple_pads(uart4_pads,
- ARRAY_SIZE(uart4_pads));
- break;
- }
-}
+#define ARI_BT_4 "aristainetos2_4@2"
+#define ARI_BT_7 "aristainetos2_7@1"
int board_phy_config(struct phy_device *phydev)
{
return 0;
}
-int board_eth_init(bd_t *bis)
-{
- setup_iomux_enet();
- return cpu_eth_init(bis);
-}
-
static int rotate_logo_one(unsigned char *out, unsigned char *in)
{
int i, j;
void rotate_logo(int rotations)
{
unsigned char out_logo[BMP_LOGO_WIDTH * BMP_LOGO_HEIGHT];
+ struct bmp_header *header;
unsigned char *in_logo;
int i, j;
if (BMP_LOGO_WIDTH != BMP_LOGO_HEIGHT)
return;
- in_logo = bmp_logo_bitmap;
+ header = (struct bmp_header *)bmp_logo_bitmap;
+ in_logo = bmp_logo_bitmap + header->data_offset;
/* one 90 degree rotation */
if (rotations == 1 || rotations == 2 || rotations == 3)
out_logo[i * BMP_LOGO_WIDTH + j];
}
-static void enable_display_power(void)
-{
- imx_iomux_v3_setup_multiple_pads(backlight_pads,
- ARRAY_SIZE(backlight_pads));
-
- /* backlight enable */
- gpio_direction_output(IMX_GPIO_NR(6, 31), 1);
- /* LCD power enable */
- gpio_direction_output(IMX_GPIO_NR(6, 15), 1);
-
- /* enable backlight PWM 1 */
- if (pwm_init(0, 0, 0))
- goto error;
- /* duty cycle 500ns, period: 3000ns */
- if (pwm_config(0, 50000, 300000))
- goto error;
- if (pwm_enable(0))
- goto error;
- return;
-
-error:
- puts("error init pwm for backlight\n");
-}
-
static void enable_lvds(struct display_info_t const *dev)
{
struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
rotate_logo(3); /* portrait display in landscape mode */
#endif
- /*
- * set ldb clock to 28341000 Hz calculated through the formula:
- * (XRES + LEFT_M + RIGHT_M + HSYNC_LEN) *
- * (YRES + UPPER_M + LOWER_M + VSYNC_LEN) * REFRESH)
- * see:
- * https://community.freescale.com/thread/308170
- */
- ipu_set_ldb_clock(28341000);
-
reg = readl(&ccm->cs2cdr);
/* select pll 5 clock */
| (IOMUXC_GPR3_MUX_SRC_IPU1_DI0
<< IOMUXC_GPR3_LVDS0_MUX_CTL_OFFSET);
writel(reg, &iomux->gpr[3]);
-
- imx_iomux_v3_setup_multiple_pads(display_pads,
- ARRAY_SIZE(display_pads));
}
static void setup_display(void)
{
enable_ipu_clock();
- enable_display_power();
-}
-
-static void setup_iomux_gpio(void)
-{
- imx_iomux_v3_setup_multiple_pads(gpio_pads, ARRAY_SIZE(gpio_pads));
}
static void set_gpr_register(void)
&iomuxc_regs->gpr[12]);
}
+extern char __bss_start[], __bss_end[];
int board_early_init_f(void)
{
- setup_iomux_uart();
- setup_iomux_gpio();
-
- gpio_direction_output(SOFT_RESET_GPIO, 1);
- gpio_direction_output(SD2_DRIVER_ENABLE, 1);
- setup_display();
+ select_ldb_di_clock_source(MXC_PLL5_CLK);
set_gpr_register();
+
+ /*
+ * clear bss here, so we can use spi driver
+ * before relocation and read Environment
+ * from spi flash.
+ */
+ memset(__bss_start, 0x00, __bss_end - __bss_start);
+
return 0;
}
-static void setup_i2c4(void)
+static void setup_one_led(char *label, int state)
{
- setup_i2c(3, CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE,
- &i2c_pad_info4);
+ struct udevice *dev;
+ int ret;
+
+ ret = led_get_by_label(label, &dev);
+ if (ret == 0)
+ led_set_state(dev, state);
}
static void setup_board_gpio(void)
{
- /* enable all LEDs */
- gpio_request(IMX_GPIO_NR(2, 13), "LED ena"); /* 25 */
- gpio_direction_output(IMX_GPIO_NR(1, 25), 0);
-
+ setup_one_led("led_ena", LEDST_ON);
/* switch off Status LEDs */
-#if (CONFIG_SYS_BOARD_VERSION == 2)
- gpio_request(IMX_GPIO_NR(6, 16), "LED yellow"); /* 176 */
- gpio_direction_output(IMX_GPIO_NR(6, 16), 1);
- gpio_request(IMX_GPIO_NR(2, 28), "LED red"); /* 60 */
- gpio_direction_output(IMX_GPIO_NR(2, 28), 1);
- gpio_request(IMX_GPIO_NR(5, 4), "LED green"); /* 132 */
- gpio_direction_output(IMX_GPIO_NR(5, 4), 1);
- gpio_request(IMX_GPIO_NR(2, 29), "LED blue"); /* 61 */
- gpio_direction_output(IMX_GPIO_NR(2, 29), 1);
-#elif (CONFIG_SYS_BOARD_VERSION == 3)
- gpio_request(IMX_GPIO_NR(6, 16), "LED yellow"); /* 176 */
- gpio_direction_output(IMX_GPIO_NR(6, 16), 0);
- gpio_request(IMX_GPIO_NR(5, 0), "LED red"); /* 128 */
- gpio_direction_output(IMX_GPIO_NR(5, 0), 0);
- gpio_request(IMX_GPIO_NR(5, 4), "LED green"); /* 132 */
- gpio_direction_output(IMX_GPIO_NR(5, 4), 0);
- gpio_request(IMX_GPIO_NR(2, 29), "LED blue"); /* 61 */
- gpio_direction_output(IMX_GPIO_NR(2, 29), 0);
-#endif
+ setup_one_led("led_yellow", LEDST_OFF);
+ setup_one_led("led_red", LEDST_OFF);
+ setup_one_led("led_green", LEDST_OFF);
+ setup_one_led("led_blue", LEDST_OFF);
}
-static void setup_board_spi(void)
+#define ARI_RESC_FMT "setenv rescue_reason setenv bootargs \\${bootargs}" \
+ " rescueReason=%d "
+
+static void aristainetos_run_rescue_command(int reason)
{
- /* enable spi bus #2 SS drivers (and spi bus #4 SS1 for rev2b) */
- gpio_direction_output(IMX_GPIO_NR(6, 6), 1);
+ char rescue_reason_command[80];
+
+ sprintf(rescue_reason_command, ARI_RESC_FMT, reason);
+ run_command(rescue_reason_command, 0);
}
-int board_late_init(void)
+static int aristainetos_eeprom(void)
{
+ struct udevice *dev;
+ int off;
+ int ret;
+ u8 data[0x10];
+ u8 rescue_reason;
+
+ off = fdt_path_offset(gd->fdt_blob, "eeprom0");
+ if (off < 0) {
+ printf("%s: No eeprom0 path offset\n", __func__);
+ return off;
+ }
+
+ ret = uclass_get_device_by_of_offset(UCLASS_I2C_EEPROM, off, &dev);
+ if (ret) {
+ printf("%s: Could not find EEPROM\n", __func__);
+ return ret;
+ }
+
+ ret = i2c_set_chip_offset_len(dev, 2);
+ if (ret)
+ return ret;
+
+ ret = i2c_eeprom_read(dev, 0x1ff0, (uint8_t *)data, 6);
+ if (ret) {
+ printf("%s: Could not read EEPROM\n", __func__);
+ return ret;
+ }
+
+ if (strncmp((char *)&data[3], "ReScUe", 6) == 0) {
+ rescue_reason = *(uint8_t *)&data[9];
+ memset(&data[3], 0xff, 7);
+ i2c_eeprom_write(dev, 0x1ff0, (uint8_t *)&data[3], 7);
+ printf("\nBooting into Rescue System (EEPROM)\n");
+ aristainetos_run_rescue_command(rescue_reason);
+ run_command("run rescue_load_fit rescueboot", 0);
+ } else if (strncmp((char *)data, "DeF", 3) == 0) {
+ memset(data, 0xff, 3);
+ i2c_eeprom_write(dev, 0x1ff0, (uint8_t *)data, 3);
+ printf("\nClear u-boot environment (set back to defaults)\n");
+ run_command("run default_env; saveenv; saveenv", 0);
+ }
+
+ return 0;
+};
+
+static void aristainetos_bootmode_settings(void)
+{
+ struct gpio_desc *desc;
+ struct src *psrc = (struct src *)SRC_BASE_ADDR;
+ unsigned int sbmr1 = readl(&psrc->sbmr1);
char *my_bootdelay;
char bootmode = 0;
- char const *panel = env_get("panel");
+ int ret;
/*
* Check the boot-source. If booting from NOR Flash,
* disable bootdelay
*/
- gpio_request(IMX_GPIO_NR(7, 6), "bootsel0");
- gpio_direction_input(IMX_GPIO_NR(7, 6));
- gpio_request(IMX_GPIO_NR(7, 7), "bootsel1");
- gpio_direction_input(IMX_GPIO_NR(7, 7));
- gpio_request(IMX_GPIO_NR(7, 1), "bootsel2");
- gpio_direction_input(IMX_GPIO_NR(7, 1));
- bootmode |= (gpio_get_value(IMX_GPIO_NR(7, 6)) ? 1 : 0) << 0;
- bootmode |= (gpio_get_value(IMX_GPIO_NR(7, 7)) ? 1 : 0) << 1;
- bootmode |= (gpio_get_value(IMX_GPIO_NR(7, 1)) ? 1 : 0) << 2;
+ ret = gpio_hog_lookup_name("bootsel0", &desc);
+ if (!ret)
+ bootmode |= (dm_gpio_get_value(desc) ? 1 : 0) << 0;
+ ret = gpio_hog_lookup_name("bootsel1", &desc);
+ if (!ret)
+ bootmode |= (dm_gpio_get_value(desc) ? 1 : 0) << 1;
+ ret = gpio_hog_lookup_name("bootsel2", &desc);
+ if (!ret)
+ bootmode |= (dm_gpio_get_value(desc) ? 1 : 0) << 2;
if (bootmode == 7) {
my_bootdelay = env_get("nor_bootdelay");
- if (my_bootdelay != NULL)
+ if (my_bootdelay)
env_set("bootdelay", my_bootdelay);
else
env_set("bootdelay", "-2");
}
- /* if we have the lg panel, we can initialze it now */
- if (panel)
- if (!strcmp(panel, displays[1].mode.name))
- lg4573_spi_startup(CONFIG_LG4573_BUS,
- CONFIG_LG4573_CS,
- 10000000, SPI_MODE_0);
+ if (sbmr1 & 0x40) {
+ env_set("bootmode", "1");
+ printf("SD bootmode jumper set!\n");
+ } else {
+ env_set("bootmode", "0");
+ }
- return 0;
+ /* read out some jumper values*/
+ ret = gpio_hog_lookup_name("env_reset", &desc);
+ if (!ret) {
+ if (dm_gpio_get_value(desc)) {
+ printf("\nClear env (set back to defaults)\n");
+ run_command("run default_env; saveenv; saveenv", 0);
+ }
+ }
+ ret = gpio_hog_lookup_name("boot_rescue", &desc);
+ if (!ret) {
+ if (dm_gpio_get_value(desc)) {
+ aristainetos_run_rescue_command(16);
+ run_command("run rescue_xload_boot", 0);
+ }
+ }
}
-struct i2c_pads_info i2c_pad_info1 = {
- .scl = {
- .i2c_mode = MX6_PAD_CSI0_DAT9__I2C1_SCL | PC,
- .gpio_mode = MX6_PAD_CSI0_DAT9__GPIO5_IO27 | PC,
- .gp = IMX_GPIO_NR(5, 27)
- },
- .sda = {
- .i2c_mode = MX6_PAD_CSI0_DAT8__I2C1_SDA | PC,
- .gpio_mode = MX6_PAD_CSI0_DAT8__GPIO5_IO26 | PC,
- .gp = IMX_GPIO_NR(5, 26)
- }
-};
+#if defined(CONFIG_DM_PMIC_DA9063)
+/*
+ * On the aristainetos2c boards the PMIC needs to be initialized,
+ * because the Ethernet PHY uses a different regulator that is not
+ * setup per hardware default. This does not influence the other versions
+ * as this regulator isn't used there at all.
+ *
+ * Unfortunately we have not yet a interface to setup all
+ * values we need.
+ */
+static int setup_pmic_voltages(void)
+{
+ struct udevice *dev;
+ int off;
+ int ret;
-struct i2c_pads_info i2c_pad_info2 = {
- .scl = {
- .i2c_mode = MX6_PAD_KEY_COL3__I2C2_SCL | PC,
- .gpio_mode = MX6_PAD_KEY_COL3__GPIO4_IO12 | PC,
- .gp = IMX_GPIO_NR(4, 12)
- },
- .sda = {
- .i2c_mode = MX6_PAD_KEY_ROW3__I2C2_SDA | PC,
- .gpio_mode = MX6_PAD_KEY_ROW3__GPIO4_IO13 | PC,
- .gp = IMX_GPIO_NR(4, 13)
+ off = fdt_path_offset(gd->fdt_blob, "pmic0");
+ if (off < 0) {
+ printf("%s: No pmic path offset\n", __func__);
+ return off;
}
-};
-iomux_v3_cfg_t const usdhc1_pads[] = {
- MX6_PAD_SD1_CLK__SD1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD1_CMD__SD1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD1_DAT0__SD1_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD1_DAT1__SD1_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD1_DAT2__SD1_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
- MX6_PAD_SD1_DAT3__SD1_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
-};
+ ret = uclass_get_device_by_of_offset(UCLASS_PMIC, off, &dev);
+ if (ret) {
+ printf("%s: Could not find PMIC\n", __func__);
+ return ret;
+ }
-int dram_init(void)
-{
- gd->ram_size = imx_ddr_size();
+ pmic_reg_write(dev, DA9063_REG_PAGE_CON, 0x01);
+ pmic_reg_write(dev, DA9063_REG_BPRO_CFG, 0xc1);
+ ret = pmic_reg_read(dev, DA9063_REG_BUCK_ILIM_B);
+ if (ret < 0) {
+ printf("%s: error %d get register\n", __func__, ret);
+ return ret;
+ }
+ ret &= 0xf0;
+ ret |= 0x09;
+ pmic_reg_write(dev, DA9063_REG_BUCK_ILIM_B, ret);
+ pmic_reg_write(dev, DA9063_REG_VBPRO_A, 0x43);
+ pmic_reg_write(dev, DA9063_REG_VBPRO_B, 0xc3);
return 0;
}
-
-#ifdef CONFIG_FSL_ESDHC_IMX
-struct fsl_esdhc_cfg usdhc_cfg[2] = {
- {USDHC1_BASE_ADDR},
- {USDHC2_BASE_ADDR},
-};
-
-int board_mmc_getcd(struct mmc *mmc)
+#else
+static int setup_pmic_voltages(void)
{
- return 1;
+ return 0;
}
+#endif
-int board_mmc_init(bd_t *bis)
+int board_late_init(void)
{
- usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
- imx_iomux_v3_setup_multiple_pads(usdhc1_pads, ARRAY_SIZE(usdhc1_pads));
-#if (CONFIG_SYS_BOARD_VERSION == 2)
- /*
- * usdhc2 has a levelshifter on the carrier board Rev. DV1,
- * that will automatically detect the driving direction.
- * During initialisation this isn't working correctly,
- * which causes DAT3 to be driven low towards the SD-card.
- * This causes a SD-card enetring the SPI-Mode
- * and therefore getting inaccessible until next power cycle.
- * As workaround we drive the DAT3 line as GPIO and set it high.
- * This makes usdhc2 unusable in u-boot, but works for the
- * initialisation in Linux
- */
- imx_iomux_v3_setup_pad(MX6_PAD_SD2_DAT3__GPIO1_IO12 |
- MUX_PAD_CTRL(NO_PAD_CTRL));
- gpio_direction_output(IMX_GPIO_NR(1, 12) , 1);
-#endif
- return fsl_esdhc_initialize(bis, &usdhc_cfg[0]);
+ int x, y;
+
+ led_default_state();
+ splash_get_pos(&x, &y);
+ bmp_display((ulong)&bmp_logo_bitmap[0], x, y);
+
+ aristainetos_bootmode_settings();
+
+ /* eeprom work */
+ aristainetos_eeprom();
+
+ /* set board_type */
+ if (gd->board_type == BOARD_TYPE_4)
+ env_set("board_type", ARI_BT_4);
+ else
+ env_set("board_type", ARI_BT_7);
+
+ if (setup_pmic_voltages())
+ printf("Error setup PMIC\n");
+
+ return 0;
}
-#endif
-/*
- * Do not overwrite the console
- * Use always serial for U-Boot console
- */
-int overwrite_console(void)
+int dram_init(void)
{
- return 1;
+ gd->ram_size = imx_ddr_size();
+
+ return 0;
}
struct display_info_t const displays[] = {
.vmode = FB_VMODE_NONINTERLACED
}
}
-#if ((CONFIG_SYS_BOARD_VERSION == 2) || (CONFIG_SYS_BOARD_VERSION == 3))
+#if ((CONFIG_SYS_BOARD_VERSION == 2) || \
+ (CONFIG_SYS_BOARD_VERSION == 3) || \
+ (CONFIG_SYS_BOARD_VERSION == 4) || \
+ (CONFIG_SYS_BOARD_VERSION == 5))
, {
.bus = -1,
.addr = 0,
};
size_t display_count = ARRAY_SIZE(displays);
-/* no console on this board */
-int board_cfb_skip(void)
-{
- return 1;
-}
-
+#if defined(CONFIG_MTD_RAW_NAND)
iomux_v3_cfg_t nfc_pads[] = {
MX6_PAD_NANDF_CLE__NAND_CLE | MUX_PAD_CTRL(NO_PAD_CTRL),
MX6_PAD_NANDF_ALE__NAND_ALE | MUX_PAD_CTRL(NO_PAD_CTRL),
/* enable apbh clock gating */
setbits_le32(&mxc_ccm->CCGR0, MXC_CCM_CCGR0_APBHDMA_MASK);
}
+#else
+static void setup_gpmi_nand(void)
+{
+}
+#endif
int board_init(void)
{
/* address of boot parameters */
gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
- setup_spi();
-
- setup_i2c(0, CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE,
- &i2c_pad_info1);
- setup_i2c(1, CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE,
- &i2c_pad_info2);
- setup_i2c(2, CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE,
- &i2c_pad_info3);
- setup_i2c4();
-
- /* SPI NOR Flash read only */
- gpio_request(CONFIG_GPIO_ENABLE_SPI_FLASH, "ena_spi_nor");
- gpio_direction_output(CONFIG_GPIO_ENABLE_SPI_FLASH, 0);
- gpio_free(CONFIG_GPIO_ENABLE_SPI_FLASH);
-
setup_board_gpio();
setup_gpmi_nand();
- setup_board_spi();
+ setup_display();
/* GPIO_1 for USB_OTG_ID */
clrsetbits_le32(&iomux->gpr[1], IOMUXC_GPR1_USB_OTG_ID_SEL_MASK, 0);
- imx_iomux_v3_setup_multiple_pads(misc_pads, ARRAY_SIZE(misc_pads));
return 0;
}
-int checkboard(void)
+int board_fit_config_name_match(const char *name)
{
- printf("Board: %s\n", CONFIG_BOARDNAME);
- return 0;
+ if (gd->board_type == BOARD_TYPE_4 &&
+ strchr(name, 0x34))
+ return 0;
+
+ if (gd->board_type == BOARD_TYPE_7 &&
+ strchr(name, 0x37))
+ return 0;
+
+ return -1;
}
-#ifdef CONFIG_USB_EHCI_MX6
-int board_ehci_hcd_init(int port)
+static void do_board_detect(void)
{
int ret;
+ char s[30];
- ret = gpio_request(ARISTAINETOS_USB_H1_PWR, "usb-h1-pwr");
- if (!ret)
- gpio_direction_output(ARISTAINETOS_USB_H1_PWR, 1);
- ret = gpio_request(ARISTAINETOS_USB_OTG_PWR, "usb-OTG-pwr");
- if (!ret)
- gpio_direction_output(ARISTAINETOS_USB_OTG_PWR, 1);
- return 0;
+ /* default use board type 7 */
+ gd->board_type = BOARD_TYPE_7;
+ if (env_init())
+ return;
+
+ ret = env_get_f("panel", s, sizeof(s));
+ if (ret < 0)
+ return;
+
+ if (!strncmp("lg4573", s, 6))
+ gd->board_type = BOARD_TYPE_4;
}
-int board_ehci_power(int port, int on)
+#ifdef CONFIG_DTB_RESELECT
+int embedded_dtb_select(void)
{
- if (port)
- gpio_set_value(ARISTAINETOS_USB_OTG_PWR, on);
- else
- gpio_set_value(ARISTAINETOS_USB_H1_PWR, on);
+ int rescan;
+
+ do_board_detect();
+ fdtdec_resetup(&rescan);
+
return 0;
}
#endif