/**************************************************************************
* TLB table for revB
*
- * Notice: revB of the 440SPe chip is very strict about PLB real addressess
+ * Notice: revB of the 440SPe chip is very strict about PLB real addresses
* and ranges to be mapped for config space: it seems to only work with
* d_nnnn_nnnn range (hangs the core upon config transaction attempts when
* set otherwise) while revA uses c_nnnn_nnnn.