p1014rdb: set ddr bus width properly depending on SVR

[oweals/u-boot.git] / board / amcc / taihu / flash.c

diff --git a/board/amcc/taihu/flash.c b/board/amcc/taihu/flash.c
index e9fbbb1029e237a7aa5b59722f73314be8ba25e6..63968a410a89fb79af9c4eaa699cc0dc2ad35736 100644 (file)
--- a/board/amcc/taihu/flash.c
+++ b/board/amcc/taihu/flash.c
@@ -511,7 +511,7 @@ int flash_erase(flash_info_t * info, int s_first, int s_last)
 {
        volatile CONFIG_SYS_FLASH_WORD_SIZE *addr = (CONFIG_SYS_FLASH_WORD_SIZE *) (info->start[0]);
        volatile CONFIG_SYS_FLASH_WORD_SIZE *addr2;
-       int flag, prot, sect, l_sect;
+       int flag, prot, sect;
        int i;
 
        if ((s_first < 0) || (s_first > s_last)) {
@@ -542,8 +542,6 @@ int flash_erase(flash_info_t * info, int s_first, int s_last)
                printf("\n");
        }
 
-       l_sect = -1;
-
        /* Disable interrupts which might cause a timeout here */
        flag = disable_interrupts();
 
@@ -569,7 +567,6 @@ int flash_erase(flash_info_t * info, int s_first, int s_last)
                                addr[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00550055;
                                addr2[0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00300030;     /* sector erase */
                        }
-                       l_sect = sect;
                        /*
                         * Wait for each sector to complete, it's more
                         * reliable.  According to AMD Spec, you must
@@ -953,7 +950,7 @@ static int flash_erase_2(flash_info_t * info, int s_first, int s_last)
 {
        volatile CONFIG_SYS_FLASH_WORD_SIZE *addr = (CONFIG_SYS_FLASH_WORD_SIZE *) (info->start[0]);
        volatile CONFIG_SYS_FLASH_WORD_SIZE *addr2;
-       int flag, prot, sect, l_sect;
+       int flag, prot, sect;
        int i;
 
        if ((s_first < 0) || (s_first > s_last)) {
@@ -984,8 +981,6 @@ static int flash_erase_2(flash_info_t * info, int s_first, int s_last)
                printf("\n");
        }
 
-       l_sect = -1;
-
        /* Disable interrupts which might cause a timeout here */
        flag = disable_interrupts();
 
@@ -1011,7 +1006,6 @@ static int flash_erase_2(flash_info_t * info, int s_first, int s_last)
                                addr[CONFIG_SYS_FLASH_CHAR_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x55555555;
                                addr2[0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x30303030;     /* sector erase */
                        }
-                       l_sect = sect;
                        /*
                         * Wait for each sector to complete, it's more
                         * reliable.  According to AMD Spec, you must