ppc4xx: acadia: Add fdt support and fix section overlap problem

[oweals/u-boot.git] / board / amcc / canyonlands / init.S

diff --git a/board/amcc/canyonlands/init.S b/board/amcc/canyonlands/init.S
index 5d4884727e38b084ae7e947d7de80435ad274cf6..258fb5de8ffb9dea5a30ddd780e5be48fbcef1db 100644 (file)
--- a/board/amcc/canyonlands/init.S
+++ b/board/amcc/canyonlands/init.S
@@ -46,7 +46,13 @@ tlbtab:
         * use the speed up boot process. It is patched after relocation to
         * enable SA_I
         */
+#ifndef CONFIG_NAND_SPL
        tlbentry(CFG_BOOT_BASE_ADDR, SZ_16M, CFG_BOOT_BASE_ADDR, 4, AC_R|AC_W|AC_X|SA_G) /* TLB 0 */
+#else
+       tlbentry(CFG_NAND_BOOT_SPL_SRC, SZ_4K, CFG_NAND_BOOT_SPL_SRC, 4, AC_R|AC_W|AC_X|SA_G)
+       tlbentry(CFG_SDRAM_BASE, SZ_256M, CFG_SDRAM_BASE, 0, AC_R|AC_W|AC_X|SA_G|SA_I)
+       tlbentry(256 << 20, SZ_256M, 256 << 20, 0, AC_R|AC_W|AC_X|SA_G|SA_I)
+#endif
 
        /*
         * TLB entries for SDRAM are not needed on this platform.
@@ -78,11 +84,14 @@ tlbtab:
        tlbentry(CFG_BCSR_BASE, SZ_1K, CFG_BCSR_BASE, 4, AC_R|AC_W|SA_G|SA_I)
 
        /* TLB-entry for OCM */
-       tlbentry(CFG_OCM_BASE, SZ_4K, 0x00040000, 4, AC_R|AC_W|AC_X)
+       tlbentry(CFG_OCM_BASE, SZ_16K, 0x00040000, 4, AC_R|AC_W|AC_X|SA_I)
 
        /* TLB-entry for Local Configuration registers => peripherals */
        tlbentry(CFG_LOCAL_CONF_REGS, SZ_16M, CFG_LOCAL_CONF_REGS, 4, AC_R|AC_W|AC_X|SA_G|SA_I)
 
+       /* AHB: Internal USB Peripherals (USB, SATA) */
+       tlbentry(CFG_AHB_BASE, SZ_1M, 0xbff00000, 4, AC_R|AC_W|AC_X|SA_G|SA_I)
+
        tlbtab_end
 
 #if defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL)