riscv: board: Add nx25-ae250 to support RISC-V
[oweals/u-boot.git] / board / AndesTech / nx25-ae250 / nx25-ae250.c
diff --git a/board/AndesTech/nx25-ae250/nx25-ae250.c b/board/AndesTech/nx25-ae250/nx25-ae250.c
new file mode 100644 (file)
index 0000000..12f2d35
--- /dev/null
@@ -0,0 +1,77 @@
+/*
+ * Copyright (C) 2017 Andes Technology Corporation
+ * Rick Chen, Andes Technology Corporation <rick@andestech.com>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#include <asm/mach-types.h>
+#include <common.h>
+#if defined(CONFIG_FTMAC100) && !defined(CONFIG_DM_ETH)
+#include <netdev.h>
+#endif
+#include <linux/io.h>
+#include <faraday/ftsdc010.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * Miscellaneous platform dependent initializations
+ */
+
+int board_init(void)
+{
+       gd->bd->bi_arch_number = MACH_TYPE_AE250;
+       gd->bd->bi_boot_params = PHYS_SDRAM_0 + 0x400;
+
+       return 0;
+}
+
+int dram_init(void)
+{
+       unsigned long sdram_base = PHYS_SDRAM_0;
+       unsigned long expected_size = PHYS_SDRAM_0_SIZE + PHYS_SDRAM_1_SIZE;
+       unsigned long actual_size;
+
+       actual_size = get_ram_size((void *)sdram_base, expected_size);
+       gd->ram_size = actual_size;
+
+       if (expected_size != actual_size) {
+               printf("Warning: Only %lu of %lu MiB SDRAM is working\n",
+                       actual_size >> 20, expected_size >> 20);
+       }
+
+       return 0;
+}
+
+int dram_init_banksize(void)
+{
+       gd->bd->bi_dram[0].start = PHYS_SDRAM_0;
+       gd->bd->bi_dram[0].size =  PHYS_SDRAM_0_SIZE;
+       gd->bd->bi_dram[1].start = PHYS_SDRAM_1;
+       gd->bd->bi_dram[1].size =  PHYS_SDRAM_1_SIZE;
+
+       return 0;
+}
+
+#if defined(CONFIG_FTMAC100) && !defined(CONFIG_DM_ETH)
+int board_eth_init(bd_t *bd)
+{
+       return ftmac100_initialize(bd);
+}
+#endif
+
+ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info)
+{
+       return 0;
+}
+
+int board_mmc_init(bd_t *bis)
+{
+#ifndef CONFIG_DM_MMC
+#ifdef CONFIG_FTSDC010
+       ftsdc010_mmc_init(0);
+#endif
+#endif
+       return 0;
+}