x86: irq: Enable SCI on IRQ9

[oweals/u-boot.git] / arch / x86 / lib / tables.c

diff --git a/arch/x86/lib/tables.c b/arch/x86/lib/tables.c
index eccef8ab308760d1bbb9b148aa97f98df4f41762..1213a9cd2b8c3c8b1f765a7314c4329d40a8778d 100644 (file)
--- a/arch/x86/lib/tables.c
+++ b/arch/x86/lib/tables.c
@@ -5,11 +5,13 @@
  */
 
 #include <common.h>
+#include <malloc.h>
 #include <asm/sfi.h>
 #include <asm/mpspec.h>
 #include <asm/smbios.h>
 #include <asm/tables.h>
 #include <asm/acpi_table.h>
+#include <asm/coreboot_tables.h>
 
 /**
  * Function prototype to write a specific configuration table
@@ -67,22 +69,36 @@ void write_tables(void)
 {
        u32 rom_table_start = ROM_TABLE_ADDR;
        u32 rom_table_end;
+#ifdef CONFIG_SEABIOS
        u32 high_table, table_size;
+       struct memory_area cfg_tables[ARRAY_SIZE(table_write_funcs) + 1];
+#endif
        int i;
 
        for (i = 0; i < ARRAY_SIZE(table_write_funcs); i++) {
                rom_table_end = table_write_funcs[i](rom_table_start);
                rom_table_end = ALIGN(rom_table_end, ROM_TABLE_ALIGN);
 
+#ifdef CONFIG_SEABIOS
                table_size = rom_table_end - rom_table_start;
                high_table = (u32)memalign(ROM_TABLE_ALIGN, table_size);
                if (high_table) {
                        memset((void *)high_table, 0, table_size);
                        table_write_funcs[i](high_table);
+
+                       cfg_tables[i].start = high_table;
+                       cfg_tables[i].size = table_size;
                } else {
                        printf("%d: no memory for configuration tables\n", i);
                }
+#endif
 
                rom_table_start = rom_table_end;
        }
+
+#ifdef CONFIG_SEABIOS
+       /* make sure the last item is zero */
+       cfg_tables[i].size = 0;
+       write_coreboot_table(CB_TABLE_ADDR, cfg_tables);
+#endif
 }