x86: quark: Initialize non-standard BARs

[oweals/u-boot.git] / arch / x86 / include / asm / arch-quark / quark.h

diff --git a/arch/x86/include/asm/arch-quark/quark.h b/arch/x86/include/asm/arch-quark/quark.h
index ebbcf7755d1bba01693a8f76fbeb2775c58b06d6..ceb583e3f055b1a298e1c899c53c23b7a5e9ae40 100644 (file)
--- a/arch/x86/include/asm/arch-quark/quark.h
+++ b/arch/x86/include/asm/arch-quark/quark.h
@@ -14,9 +14,29 @@
 #define MSG_PORT_MEM_MGR       0x05
 #define MSG_PORT_SOC_UNIT      0x31
 
+/* Port 0x00: Memory Arbiter Message Port Registers */
+
+/* Enhanced Configuration Space */
+#define AEC_CTRL               0x00
+
+/* Port 0x03: Host Bridge Message Port Registers */
+
 /* Host Memory I/O Boundary */
 #define HM_BOUND               0x08
 
+/* Extended Configuration Space */
+#define HEC_REG                        0x09
+
+/* Port 0x04: Remote Management Unit Message Port Registers */
+
+/* ACPI PBLK Base Address Register */
+#define PBLK_BA                        0x70
+
+/* SPI DMA Base Address Register */
+#define SPI_DMA_BA             0x7a
+
+/* Port 0x05: Memory Manager Message Port Registers */
+
 /* eSRAM Block Page Control */
 #define ESRAM_BLK_CTRL         0x82
 #define ESRAM_BLOCK_MODE       0x10000000
@@ -37,4 +57,16 @@
 /* 64KiB of RMU binary in flash */
 #define RMU_BINARY_SIZE                0x10000
 
+/* Legacy Bridge PCI Configuration Registers */
+#define LB_GBA                 0x44
+#define LB_PM1BLK              0x48
+#define LB_GPE0BLK             0x4c
+#define LB_ACTL                        0x58
+#define LB_PABCDRC             0x60
+#define LB_PEFGHRC             0x64
+#define LB_WDTBA               0x84
+#define LB_BCE                 0xd4
+#define LB_BC                  0xd8
+#define LB_RCBA                        0xf0
+
 #endif /* _QUARK_H_ */