x86: Move microcode code to a common location

[oweals/u-boot.git] / arch / x86 / include / asm / arch-ivybridge / sandybridge.h

diff --git a/arch/x86/include/asm/arch-ivybridge/sandybridge.h b/arch/x86/include/asm/arch-ivybridge/sandybridge.h
index cf7457f42dc61e33635b4c4359b4686ff6d2f86f..d137d6786a938c23a2d3d604a43633c07bcdc06a 100644 (file)
--- a/arch/x86/include/asm/arch-ivybridge/sandybridge.h
+++ b/arch/x86/include/asm/arch-ivybridge/sandybridge.h
@@ -43,7 +43,7 @@
 #define DEFAULT_EPBAR          0xfed19000      /* 4 KB */
 #define DEFAULT_RCBABASE       0xfed1c000
 /* 4 KB per PCIe device */
-#define DEFAULT_PCIEXBAR       CONFIG_MMCONF_BASE_ADDRESS
+#define DEFAULT_PCIEXBAR       CONFIG_PCIE_ECAM_BASE
 
 /* Device 0:0.0 PCI configuration space (Host Bridge) */
 #define EPBAR          0x40
@@ -108,12 +108,15 @@
 
 #define DMIBAR_REG(x)  (DEFAULT_DMIBAR + x)
 
-int bridge_silicon_revision(void);
-
-void northbridge_enable(pci_dev_t dev);
-void northbridge_init(pci_dev_t dev);
+/**
+ * bridge_silicon_revision() - Get the Northbridge revision
+ *
+ * @dev:       Northbridge device
+ * @return revision ID (bits 3:0) and bridge ID (bits 7:4)
+ */
+int bridge_silicon_revision(struct udevice *dev);
 
-void report_platform_info(void);
+void report_platform_info(struct udevice *dev);
 
 void sandybridge_early_init(int chipset_type);