ARM: dts: rk3399-evb: usb3.0 host support

[oweals/u-boot.git] / arch / x86 / dts / bayleybay.dts

diff --git a/arch/x86/dts/bayleybay.dts b/arch/x86/dts/bayleybay.dts
index 4a50d8665e59cce41509450fd38a7b6660ef18be..d0168e88dbd8d84f0c056c13950a2e6d6ed081f3 100644 (file)
--- a/arch/x86/dts/bayleybay.dts
+++ b/arch/x86/dts/bayleybay.dts
@@ -1,17 +1,18 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 /dts-v1/;
 
+#include <asm/arch-baytrail/fsp/fsp_configs.h>
 #include <dt-bindings/gpio/x86-gpio.h>
 #include <dt-bindings/interrupt-router/intel-irq.h>
 
 /include/ "skeleton.dtsi"
 /include/ "keyboard.dtsi"
 /include/ "serial.dtsi"
+/include/ "reset.dtsi"
 /include/ "rtc.dtsi"
 /include/ "tsc_timer.dtsi"
 
@@ -65,6 +66,26 @@
                };
        };
 
+       pch_pinctrl {
+               compatible = "intel,x86-pinctrl";
+               reg = <0 0>;
+
+               /*
+                * As of today, the latest version FSP (gold4) for BayTrail
+                * misses the PAD configuration of the SD controller's Card
+                * Detect signal. The default PAD value for the CD pin sets
+                * the pin to work in GPIO mode, which causes card detect
+                * status cannot be reflected by the Present State register
+                * in the SD controller (bit 16 & bit 18 are always zero).
+                *
+                * Configure this pin to function 1 (SD controller).
+                */
+               sdmmc3_cd@0 {
+                       pad-offset = <0x3a0>;
+                       mode-func = <1>;
+               };
+       };
+
        pci {
                compatible = "pci-x86";
                #address-cells = <3>;
@@ -154,7 +175,7 @@
                                        #size-cells = <1>;
                                        reg = <0>;
                                        compatible = "winbond,w25q64dw",
-                                               "spi-flash";
+                                               "jedec,spi-nor";
                                        memory-map = <0xff800000 0x00800000>;
                                        rw-mrc-cache {
                                                label = "rw-mrc-cache";
@@ -168,6 +189,7 @@
                                u-boot,dm-pre-reloc;
                                reg = <0 0x20>;
                                bank-name = "A";
+                               use-lvl-write-cache;
                        };
 
                        gpiob {
@@ -175,6 +197,7 @@
                                u-boot,dm-pre-reloc;
                                reg = <0x20 0x20>;
                                bank-name = "B";
+                               use-lvl-write-cache;
                        };
 
                        gpioc {
@@ -182,6 +205,7 @@
                                u-boot,dm-pre-reloc;
                                reg = <0x40 0x20>;
                                bank-name = "C";
+                               use-lvl-write-cache;
                        };
 
                        gpiod {
@@ -189,6 +213,7 @@
                                u-boot,dm-pre-reloc;
                                reg = <0x60 0x20>;
                                bank-name = "D";
+                               use-lvl-write-cache;
                        };
 
                        gpioe {
@@ -196,6 +221,7 @@
                                u-boot,dm-pre-reloc;
                                reg = <0x80 0x20>;
                                bank-name = "E";
+                               use-lvl-write-cache;
                        };
 
                        gpiof {
@@ -203,25 +229,26 @@
                                u-boot,dm-pre-reloc;
                                reg = <0xA0 0x20>;
                                bank-name = "F";
+                               use-lvl-write-cache;
                        };
                };
        };
 
        fsp {
                compatible = "intel,baytrail-fsp";
-               fsp,mrc-init-tseg-size = <0>;
-               fsp,mrc-init-mmio-size = <0x800>;
+               fsp,mrc-init-tseg-size = <MRC_INIT_TSEG_SIZE_1MB>;
+               fsp,mrc-init-mmio-size = <MRC_INIT_MMIO_SIZE_2048MB>;
                fsp,mrc-init-spd-addr1 = <0xa0>;
                fsp,mrc-init-spd-addr2 = <0xa2>;
-               fsp,emmc-boot-mode = <2>;
+               fsp,emmc-boot-mode = <EMMC_BOOT_MODE_AUTO>;
                fsp,enable-sdio;
                fsp,enable-sdcard;
                fsp,enable-hsuart1;
                fsp,enable-spi;
                fsp,enable-sata;
-               fsp,sata-mode = <1>;
-               fsp,enable-lpe;
-               fsp,lpss-sio-enable-pci-mode;
+               fsp,sata-mode = <SATA_MODE_AHCI>;
+               fsp,lpe-mode = <LPE_MODE_PCI>;
+               fsp,lpss-sio-mode = <LPSS_SIO_MODE_PCI>;
                fsp,enable-dma0;
                fsp,enable-dma1;
                fsp,enable-i2c0;
@@ -233,13 +260,11 @@
                fsp,enable-i2c6;
                fsp,enable-pwm0;
                fsp,enable-pwm1;
-               fsp,igd-dvmt50-pre-alloc = <2>;
-               fsp,aperture-size = <2>;
-               fsp,gtt-size = <2>;
-               fsp,serial-debug-port-address = <0x3f8>;
-               fsp,serial-debug-port-type = <1>;
-               fsp,scc-enable-pci-mode;
-               fsp,os-selection = <4>;
+               fsp,igd-dvmt50-pre-alloc = <IGD_DVMT50_PRE_ALLOC_64MB>;
+               fsp,aperture-size = <APERTURE_SIZE_256MB>;
+               fsp,gtt-size = <GTT_SIZE_2MB>;
+               fsp,scc-mode = <SCC_MODE_PCI>;
+               fsp,os-selection = <OS_SELECTION_LINUX>;
                fsp,emmc45-ddr50-enabled;
                fsp,emmc45-retune-timer-value = <8>;
                fsp,enable-igd;