+// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
/dts-v1/;
+#include <asm/arch-baytrail/fsp/fsp_configs.h>
#include <dt-bindings/gpio/x86-gpio.h>
#include <dt-bindings/interrupt-router/intel-irq.h>
/include/ "skeleton.dtsi"
/include/ "keyboard.dtsi"
/include/ "serial.dtsi"
+/include/ "reset.dtsi"
/include/ "rtc.dtsi"
/include/ "tsc_timer.dtsi"
-/include/ "coreboot_fb.dtsi"
/ {
model = "Intel Bayley Bay";
#size-cells = <1>;
reg = <0>;
compatible = "winbond,w25q64dw",
- "spi-flash";
+ "jedec,spi-nor";
memory-map = <0xff800000 0x00800000>;
rw-mrc-cache {
label = "rw-mrc-cache";
fsp {
compatible = "intel,baytrail-fsp";
- fsp,mrc-init-tseg-size = <1>;
- fsp,mrc-init-mmio-size = <0x800>;
+ fsp,mrc-init-tseg-size = <MRC_INIT_TSEG_SIZE_1MB>;
+ fsp,mrc-init-mmio-size = <MRC_INIT_MMIO_SIZE_2048MB>;
fsp,mrc-init-spd-addr1 = <0xa0>;
fsp,mrc-init-spd-addr2 = <0xa2>;
- fsp,emmc-boot-mode = <1>;
+ fsp,emmc-boot-mode = <EMMC_BOOT_MODE_AUTO>;
fsp,enable-sdio;
fsp,enable-sdcard;
fsp,enable-hsuart1;
fsp,enable-spi;
fsp,enable-sata;
- fsp,sata-mode = <1>;
- fsp,enable-lpe;
- fsp,lpss-sio-enable-pci-mode;
+ fsp,sata-mode = <SATA_MODE_AHCI>;
+ fsp,lpe-mode = <LPE_MODE_PCI>;
+ fsp,lpss-sio-mode = <LPSS_SIO_MODE_PCI>;
fsp,enable-dma0;
fsp,enable-dma1;
fsp,enable-i2c0;
fsp,enable-i2c6;
fsp,enable-pwm0;
fsp,enable-pwm1;
- fsp,igd-dvmt50-pre-alloc = <2>;
- fsp,aperture-size = <2>;
- fsp,gtt-size = <2>;
- fsp,scc-enable-pci-mode;
- fsp,os-selection = <4>;
+ fsp,igd-dvmt50-pre-alloc = <IGD_DVMT50_PRE_ALLOC_64MB>;
+ fsp,aperture-size = <APERTURE_SIZE_256MB>;
+ fsp,gtt-size = <GTT_SIZE_2MB>;
+ fsp,scc-mode = <SCC_MODE_PCI>;
+ fsp,os-selection = <OS_SELECTION_LINUX>;
fsp,emmc45-ddr50-enabled;
fsp,emmc45-retune-timer-value = <8>;
fsp,enable-igd;