Merge branch 'master' of git://git.denx.de/u-boot-blackfin

[oweals/u-boot.git] / arch / x86 / cpu / start16.S

diff --git a/arch/x86/cpu/start16.S b/arch/x86/cpu/start16.S
index 445d5a17345585b1cf467b9d80c649bf95f6e68e..826e2b43615dbfd6775cd22ec08d58266a26913b 100644 (file)
--- a/arch/x86/cpu/start16.S
+++ b/arch/x86/cpu/start16.S
@@ -1,5 +1,5 @@
 /*
- *  U-boot - x86 Startup Code
+ *  U-Boot - x86 Startup Code
  *
  * (C) Copyright 2008-2011
  * Graeme Russ, <graeme.russ@gmail.com>
@@ -21,11 +21,14 @@
 .code16
 .globl start16
 start16:
+       /* Save BIST */
+       movl    %eax, %ecx
+
        /* Set the Cold Boot / Hard Reset flag */
        movl    $GD_FLG_COLD_BOOT, %ebx
 
        xorl    %eax, %eax
-       movl    %eax, %cr3    /* Invalidate TLB */
+       movl    %eax, %cr3      /* Invalidate TLB */
 
        /* Turn off cache (this might require a 486-class CPU) */
        movl    %cr0, %eax
@@ -45,9 +48,11 @@ o32 cs       lgdt    gdt_ptr
        /* Flush the prefetch queue */
        jmp     ff
 ff:
-       /* Finally jump to the 32bit initialization code */
+
+       /* Finally restore BIST and jump to the 32-bit initialization code */
        movw    $code32start, %ax
        movw    %ax, %bp
+       movl    %ecx, %eax
 o32 cs ljmp    *(%bp)
 
        /* 48-bit far pointer */
@@ -59,17 +64,17 @@ idt_ptr:
        .word   0               /* limit */
        .long   0               /* base */
 
-/*
- * The following Global Descriptor Table is just enough to get us into
- * 'Flat Protected Mode' - It will be discarded as soon as the final
- * GDT is setup in a safe location in RAM
- */
+       /*
+        * The following Global Descriptor Table is just enough to get us into
+        * 'Flat Protected Mode' - It will be discarded as soon as the final
+        * GDT is setup in a safe location in RAM
+        */
 gdt_ptr:
        .word   0x1f            /* limit (31 bytes = 4 GDT entries - 1) */
        .long   BOOT_SEG + gdt  /* base */
 
-/* Some CPUs are picky about GDT alignment... */
-.align 16
+       /* Some CPUs are picky about GDT alignment... */
+       .align  16
 gdt:
        /*
         * The GDT table ...