x86: queensbay: Change CPU_ADDR_BITS to 32

[oweals/u-boot.git] / arch / x86 / cpu / queensbay / Kconfig

diff --git a/arch/x86/cpu/queensbay/Kconfig b/arch/x86/cpu/queensbay/Kconfig
index 56fe85ccad074bbc61611191f298f1dd50d3cb0c..fbf85f233fb36e9e2ae98c02b411ff6b9da4b6b2 100644 (file)
--- a/arch/x86/cpu/queensbay/Kconfig
+++ b/arch/x86/cpu/queensbay/Kconfig
@@ -11,44 +11,6 @@ config INTEL_QUEENSBAY
 
 if INTEL_QUEENSBAY
 
-config HAVE_FSP
-       bool "Add an Firmware Support Package binary"
-       help
-         Select this option to add an Firmware Support Package binary to
-         the resulting U-Boot image. It is a binary blob which U-Boot uses
-         to set up SDRAM and other chipset specific initialization.
-
-         Note: Without this binary U-Boot will not be able to set up its
-         SDRAM so will not boot.
-
-config FSP_FILE
-       string "Firmware Support Package binary filename"
-       depends on HAVE_FSP
-       default "fsp.bin"
-       help
-         The filename of the file to use as Firmware Support Package binary
-         in the board directory.
-
-config FSP_LOCATION
-       hex "Firmware Support Package binary location"
-       depends on HAVE_FSP
-       default 0xfffc0000
-       help
-         FSP is not Position Independent Code (PIC) and the whole FSP has to
-         be rebased if it is placed at a location which is different from the
-         perferred base address specified during the FSP build. Use Intel's
-         Binary Configuration Tool (BCT) to do the rebase.
-
-         The default base address of 0xfffc0000 indicates that the binary must
-         be located at offset 0xc0000 from the beginning of a 1MB flash device.
-
-config FSP_TEMP_RAM_ADDR
-       hex
-       default 0x2000000
-       help
-         Stack top address which is used in FspInit after DRAM is ready and
-         CAR is disabled.
-
 config HAVE_CMC
        bool "Add a Chipset Micro Code state machine binary"
        help
@@ -65,7 +27,7 @@ config CMC_FILE
          The filename of the file to use as Chipset Micro Code state machine
          binary in the board directory.
 
-config CMC_LOCATION
+config CMC_ADDR
        hex "Chipset Micro Code state machine binary location"
        depends on HAVE_CMC
        default 0xfffb0000
@@ -76,4 +38,8 @@ config CMC_LOCATION
          The default base address of 0xfffb0000 indicates that the binary must
          be located at offset 0xb0000 from the beginning of a 1MB flash device.
 
+config CPU_ADDR_BITS
+       int
+       default 32
+
 endif