x86: Add common functions for TDP and perf control

[oweals/u-boot.git] / arch / x86 / cpu / ivybridge / model_206ax.c

diff --git a/arch/x86/cpu/ivybridge/model_206ax.c b/arch/x86/cpu/ivybridge/model_206ax.c
index 3177ba3297fb419ea2f1286f12160861d80086e4..56ab6bf4acf5c7db82c94cb03d69aacd4aabd509 100644 (file)
--- a/arch/x86/cpu/ivybridge/model_206ax.c
+++ b/arch/x86/cpu/ivybridge/model_206ax.c
@@ -140,19 +140,16 @@ static const u8 power_limit_time_msr_to_sec[] = {
        [0x11] = 128,
 };
 
-int cpu_config_tdp_levels(void)
+bool cpu_ivybridge_config_tdp_levels(void)
 {
        struct cpuid_result result;
-       msr_t platform_info;
 
        /* Minimum CPU revision */
        result = cpuid(1);
        if (result.eax < IVB_CONFIG_TDP_MIN_CPUID)
-               return 0;
+               return false;
 
-       /* Bits 34:33 indicate how many levels supported */
-       platform_info = msr_read(MSR_PLATFORM_INFO);
-       return (platform_info.hi >> 1) & 3;
+       return cpu_config_tdp_levels();
 }
 
 /*
@@ -213,7 +210,7 @@ void set_power_limits(u8 power_limit_1_time)
        msr_write(MSR_PKG_POWER_LIMIT, limit);
 
        /* Use nominal TDP values for CPUs with configurable TDP */
-       if (cpu_config_tdp_levels()) {
+       if (cpu_ivybridge_config_tdp_levels()) {
                msr = msr_read(MSR_CONFIG_TDP_NOMINAL);
                limit.hi = 0;
                limit.lo = msr.lo & 0xff;
@@ -329,24 +326,20 @@ static void configure_dca_cap(void)
 
 static void set_max_ratio(void)
 {
-       msr_t msr, perf_ctl;
-
-       perf_ctl.hi = 0;
+       msr_t msr;
+       uint ratio;
 
        /* Check for configurable TDP option */
-       if (cpu_config_tdp_levels()) {
+       if (cpu_ivybridge_config_tdp_levels()) {
                /* Set to nominal TDP ratio */
                msr = msr_read(MSR_CONFIG_TDP_NOMINAL);
-               perf_ctl.lo = (msr.lo & 0xff) << 8;
+               ratio = msr.lo & 0xff;
        } else {
                /* Platform Info bits 15:8 give max ratio */
                msr = msr_read(MSR_PLATFORM_INFO);
-               perf_ctl.lo = msr.lo & 0xff00;
+               ratio = (msr.lo & 0xff00) >> 8;
        }
-       msr_write(MSR_IA32_PERF_CTL, perf_ctl);
-
-       debug("model_x06ax: frequency set to %d\n",
-             ((perf_ctl.lo >> 8) & 0xff) * INTEL_BCLK_MHZ);
+       cpu_set_perf_control(ratio);
 }
 
 static void set_energy_perf_bias(u8 policy)