arm: mach-k3: Enable dcache in SPL

[oweals/u-boot.git] / arch / x86 / cpu / i386 / cpu.c

diff --git a/arch/x86/cpu/i386/cpu.c b/arch/x86/cpu/i386/cpu.c
index 0312a26bbbf5c719e690c32e89e1ea00c29359ed..435e50edada7d368613c00a92442bb36a63c534b 100644 (file)
--- a/arch/x86/cpu/i386/cpu.c
+++ b/arch/x86/cpu/i386/cpu.c
@@ -24,6 +24,7 @@
 #include <malloc.h>
 #include <spl.h>
 #include <asm/control_regs.h>
+#include <asm/coreboot_tables.h>
 #include <asm/cpu.h>
 #include <asm/mp.h>
 #include <asm/msr.h>
@@ -447,31 +448,6 @@ int x86_cpu_init_f(void)
        return 0;
 }
 
-long detect_coreboot_table_at(ulong start, ulong size)
-{
-       u32 *ptr, *end;
-
-       size /= 4;
-       for (ptr = (void *)start, end = ptr + size; ptr < end; ptr += 4) {
-               if (*ptr == 0x4f49424c) /* "LBIO" */
-                       return (long)ptr;
-       }
-
-       return -ENOENT;
-}
-
-long locate_coreboot_table(void)
-{
-       long addr;
-
-       /* We look for LBIO in the first 4K of RAM and again at 960KB */
-       addr = detect_coreboot_table_at(0x0, 0x1000);
-       if (addr < 0)
-               addr = detect_coreboot_table_at(0xf0000, 0x1000);
-
-       return addr;
-}
-
 int x86_cpu_reinit_f(void)
 {
        setup_identity();
@@ -638,16 +614,6 @@ int cpu_jump_to_64bit_uboot(ulong target)
 
        func = (func_t)ptr;
 
-       /*
-        * Copy U-Boot from ROM
-        * TODO(sjg@chromium.org): Figure out a way to get the text base
-        * correctly here, and in the device-tree binman definition.
-        *
-        * Also consider using FIT so we get the correct image length and
-        * parameters.
-        */
-       memcpy((char *)target, (char *)0xfff00000, 0x100000);
-
        /* Jump to U-Boot */
        func((ulong)pgtable, 0, (ulong)target);