x86: broadwell: Correct I/O APIC ID

[oweals/u-boot.git] / arch / x86 / cpu / cpu.c

diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c
index 8800e09fa2a35a222ea31db0c9019e3000fd371e..e522ff3b7f651cb8f8dcbc7d02983b255674dad3 100644 (file)
--- a/arch/x86/cpu/cpu.c
+++ b/arch/x86/cpu/cpu.c
@@ -25,9 +25,12 @@
 #include <errno.h>
 #include <malloc.h>
 #include <asm/control_regs.h>
+#include <asm/coreboot_tables.h>
 #include <asm/cpu.h>
 #include <asm/lapic.h>
+#include <asm/microcode.h>
 #include <asm/mp.h>
+#include <asm/mrccache.h>
 #include <asm/msr.h>
 #include <asm/mtrr.h>
 #include <asm/post.h>
@@ -333,6 +336,16 @@ static inline void get_fms(struct cpuinfo_x86 *c, uint32_t tfms)
                c->x86_model += ((tfms >> 16) & 0xF) << 4;
 }
 
+u32 cpu_get_family_model(void)
+{
+       return gd->arch.x86_device & 0x0fff0ff0;
+}
+
+u32 cpu_get_stepping(void)
+{
+       return gd->arch.x86_mask;
+}
+
 int x86_cpu_init_f(void)
 {
        const u32 em_rst = ~X86_CR0_EM;
@@ -459,14 +472,14 @@ void  flush_cache(unsigned long dummy1, unsigned long dummy2)
 __weak void reset_cpu(ulong addr)
 {
        /* Do a hard reset through the chipset's reset control register */
-       outb(SYS_RST | RST_CPU, PORT_RESET);
+       outb(SYS_RST | RST_CPU, IO_PORT_RESET);
        for (;;)
                cpu_hlt();
 }
 
 void x86_full_reset(void)
 {
-       outb(FULL_RST | SYS_RST | RST_CPU, PORT_RESET);
+       outb(FULL_RST | SYS_RST | RST_CPU, IO_PORT_RESET);
 }
 
 int dcache_status(void)
@@ -650,10 +663,20 @@ void show_boot_progress(int val)
 }
 
 #ifndef CONFIG_SYS_COREBOOT
+/*
+ * Implement a weak default function for boards that optionally
+ * need to clean up the system before jumping to the kernel.
+ */
+__weak void board_final_cleanup(void)
+{
+}
+
 int last_stage_init(void)
 {
        write_tables();
 
+       board_final_cleanup();
+
        return 0;
 }
 #endif
@@ -730,3 +753,18 @@ int cpu_init_r(void)
 
        return 0;
 }
+
+#ifndef CONFIG_EFI_STUB
+int reserve_arch(void)
+{
+#ifdef CONFIG_ENABLE_MRC_CACHE
+       mrccache_reserve();
+#endif
+
+#ifdef CONFIG_SEABIOS
+       high_table_reserve();
+#endif
+
+       return 0;
+}
+#endif