x86: Probe pinctrl driver in cpu_init_r()

[oweals/u-boot.git] / arch / x86 / cpu / cpu.c

diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c
index 1482153d8b58c945773765b5a275cc2a21e99072..269043dedc13c976fd77f2fb9e6ee0cbbe9f1687 100644 (file)
--- a/arch/x86/cpu/cpu.c
+++ b/arch/x86/cpu/cpu.c
@@ -24,11 +24,14 @@
 #include <dm.h>
 #include <errno.h>
 #include <malloc.h>
+#include <syscon.h>
 #include <asm/control_regs.h>
+#include <asm/coreboot_tables.h>
 #include <asm/cpu.h>
 #include <asm/lapic.h>
 #include <asm/microcode.h>
 #include <asm/mp.h>
+#include <asm/mrccache.h>
 #include <asm/msr.h>
 #include <asm/mtrr.h>
 #include <asm/post.h>
@@ -749,5 +752,24 @@ int cpu_init_r(void)
        uclass_first_device(UCLASS_PCH, &dev);
        uclass_first_device(UCLASS_LPC, &dev);
 
+       /* Set up pin control if available */
+       ret = syscon_get_by_driver_data(X86_SYSCON_PINCONF, &dev);
+       debug("%s, pinctrl=%p, ret=%d\n", __func__, dev, ret);
+
+       return 0;
+}
+
+#ifndef CONFIG_EFI_STUB
+int reserve_arch(void)
+{
+#ifdef CONFIG_ENABLE_MRC_CACHE
+       mrccache_reserve();
+#endif
+
+#ifdef CONFIG_SEABIOS
+       high_table_reserve();
+#endif
+
        return 0;
 }
+#endif