#include <dm.h>
#include <errno.h>
#include <malloc.h>
+#include <syscon.h>
#include <asm/control_regs.h>
+#include <asm/coreboot_tables.h>
#include <asm/cpu.h>
#include <asm/lapic.h>
#include <asm/microcode.h>
uclass_first_device(UCLASS_PCH, &dev);
uclass_first_device(UCLASS_LPC, &dev);
+ /* Set up pin control if available */
+ ret = syscon_get_by_driver_data(X86_SYSCON_PINCONF, &dev);
+ debug("%s, pinctrl=%p, ret=%d\n", __func__, dev, ret);
+
return 0;
}
int reserve_arch(void)
{
#ifdef CONFIG_ENABLE_MRC_CACHE
- return mrccache_reserve();
-#else
- return 0;
+ mrccache_reserve();
#endif
+
+#ifdef CONFIG_SEABIOS
+ high_table_reserve();
+#endif
+
+ return 0;
}
#endif