x86: Add some missing global_data declarations in files that use gd

[oweals/u-boot.git] / arch / x86 / cpu / coreboot / pci.c

diff --git a/arch/x86/cpu/coreboot/pci.c b/arch/x86/cpu/coreboot/pci.c
index 6a3dd9391432017898e85c714100ee8e53232ce2..41e29a6086fdfb661ea521002c24f68426b119a2 100644 (file)
--- a/arch/x86/cpu/coreboot/pci.c
+++ b/arch/x86/cpu/coreboot/pci.c
@@ -10,32 +10,16 @@
  */
 
 #include <common.h>
+#include <dm.h>
 #include <pci.h>
-#include <asm/pci.h>
 
-static void config_pci_bridge(struct pci_controller *hose, pci_dev_t dev,
-                             struct pci_config_table *table)
-{
-       u8 secondary;
-       hose->read_byte(hose, dev, PCI_SECONDARY_BUS, &secondary);
-       hose->last_busno = max(hose->last_busno, (int)secondary);
-       pci_hose_scan_bus(hose, secondary);
-}
-
-static struct pci_config_table pci_coreboot_config_table[] = {
-       /* vendor, device, class, bus, dev, func */
-       { PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_BRIDGE_PCI,
-               PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, &config_pci_bridge },
-       {}
+static const struct udevice_id generic_pch_ids[] = {
+       { .compatible = "intel,pch" },
+       { }
 };
 
-void board_pci_setup_hose(struct pci_controller *hose)
-{
-       hose->config_table = pci_coreboot_config_table;
-       hose->first_busno = 0;
-       hose->last_busno = 0;
-
-       pci_set_region(hose->regions + 0, 0x0, 0x0, 0xffffffff,
-                      PCI_REGION_MEM);
-       hose->region_count = 1;
-}
+U_BOOT_DRIVER(generic_pch_drv) = {
+       .name           = "pch",
+       .id             = UCLASS_PCH,
+       .of_match       = generic_pch_ids,
+};