x86: coreboot: Convert to use more dm drivers

[oweals/u-boot.git] / arch / x86 / cpu / coreboot / coreboot.c

diff --git a/arch/x86/cpu/coreboot/coreboot.c b/arch/x86/cpu/coreboot/coreboot.c
index 22a643c9d6bc8098200866471c9b784dc5e8b163..845f86a1766c15afd9da5c0630978dcd3930b40d 100644 (file)
--- a/arch/x86/cpu/coreboot/coreboot.c
+++ b/arch/x86/cpu/coreboot/coreboot.c
@@ -3,45 +3,30 @@
  * (C) Copyright 2008
  * Graeme Russ, graeme.russ@gmail.com.
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.         See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
-#include <asm/u-boot-x86.h>
-#include <flash.h>
-#include <netdev.h>
-#include <asm/arch-coreboot/tables.h>
-#include <asm/arch-coreboot/sysinfo.h>
+#include <fdtdec.h>
+#include <asm/io.h>
+#include <asm/msr.h>
+#include <asm/mtrr.h>
+#include <asm/arch/sysinfo.h>
+#include <asm/arch/timestamp.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
-unsigned long monitor_flash_len = CONFIG_SYS_MONITOR_LEN;
-
-/*
- * Miscellaneous platform dependent initializations
- */
-int cpu_init_f(void)
+int arch_cpu_init(void)
 {
        int ret = get_coreboot_info(&lib_sysinfo);
-       if (ret != 0)
+       if (ret != 0) {
                printf("Failed to parse coreboot tables.\n");
-       return ret;
+               return ret;
+       }
+
+       timestamp_init();
+
+       return x86_cpu_init_f();
 }
 
 int board_early_init_f(void)
@@ -49,39 +34,57 @@ int board_early_init_f(void)
        return 0;
 }
 
-int board_early_init_r(void)
+int print_cpuinfo(void)
 {
-       /* CPU Speed to 100MHz */
-       gd->cpu_clk = 100000000;
+       return default_print_cpuinfo();
+}
 
-       /* Crystal is 33.000MHz */
-       gd->bus_clk = 33000000;
+int last_stage_init(void)
+{
+       if (gd->flags & GD_FLG_COLD_BOOT)
+               timestamp_add_to_bootstage();
 
        return 0;
 }
 
-void show_boot_progress(int val)
+void board_final_cleanup(void)
 {
-}
+       /*
+        * Un-cache the ROM so the kernel has one
+        * more MTRR available.
+        *
+        * Coreboot should have assigned this to the
+        * top available variable MTRR.
+        */
+       u8 top_mtrr = (native_read_msr(MTRR_CAP_MSR) & 0xff) - 1;
+       u8 top_type = native_read_msr(MTRR_PHYS_BASE_MSR(top_mtrr)) & 0xff;
 
+       /* Make sure this MTRR is the correct Write-Protected type */
+       if (top_type == MTRR_TYPE_WRPROT) {
+               struct mtrr_state state;
 
-int last_stage_init(void)
-{
-       return 0;
-}
+               mtrr_open(&state);
+               wrmsrl(MTRR_PHYS_BASE_MSR(top_mtrr), 0);
+               wrmsrl(MTRR_PHYS_MASK_MSR(top_mtrr), 0);
+               mtrr_close(&state);
+       }
 
-#ifndef CONFIG_SYS_NO_FLASH
-ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info)
-{
-       return 0;
+       if (!fdtdec_get_config_bool(gd->fdt_blob, "u-boot,no-apm-finalize")) {
+               /*
+                * Issue SMI to coreboot to lock down ME and registers
+                * when allowed via device tree
+                */
+               printf("Finalizing coreboot\n");
+               outb(0xcb, 0xb2);
+       }
 }
-#endif
 
-int board_eth_init(bd_t *bis)
+int misc_init_r(void)
 {
-       return pci_eth_init(bis);
+       return 0;
 }
 
-void setup_pcat_compatibility()
+int arch_misc_init(void)
 {
+       return 0;
 }