Merge tag 'u-boot-imx-20191009' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

[oweals/u-boot.git] / arch / x86 / cpu / baytrail / cpu.c

diff --git a/arch/x86/cpu/baytrail/cpu.c b/arch/x86/cpu/baytrail/cpu.c
index 2837709d6d14abd5f8094a1428070c10c43a6967..9394eab956ba1fca12e1f08ed9aa13b8396c4838 100644 (file)
--- a/arch/x86/cpu/baytrail/cpu.c
+++ b/arch/x86/cpu/baytrail/cpu.c
@@ -1,8 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright (C) 2015 Google, Inc
  *
- * SPDX-License-Identifier:    GPL-2.0+
- *
  * Based on code from coreboot
  */
 
@@ -69,9 +68,9 @@ static void set_max_freq(void)
        msr_t msr;
 
        /* Enable speed step */
-       msr = msr_read(MSR_IA32_MISC_ENABLES);
-       msr.lo |= (1 << 16);
-       msr_write(MSR_IA32_MISC_ENABLES, msr);
+       msr = msr_read(MSR_IA32_MISC_ENABLE);
+       msr.lo |= MISC_ENABLE_ENHANCED_SPEEDSTEP;
+       msr_write(MSR_IA32_MISC_ENABLE, msr);
 
        /*
         * Set guaranteed ratio [21:16] from IACORE_RATIOS to bits [15:8] of
@@ -81,7 +80,7 @@ static void set_max_freq(void)
        perf_ctl.lo = (msr.lo & 0x3f0000) >> 8;
 
        /*
-        * Set guaranteed vid [21:16] from IACORE_VIDS to bits [7:0] of
+        * Set guaranteed vid [22:16] from IACORE_VIDS to bits [7:0] of
         * the PERF_CTL
         */
        msr = msr_read(MSR_IACORE_VIDS);
@@ -189,6 +188,7 @@ static const struct cpu_ops cpu_x86_baytrail_ops = {
        .get_desc       = cpu_x86_get_desc,
        .get_info       = baytrail_get_info,
        .get_count      = baytrail_get_count,
+       .get_vendor     = cpu_x86_get_vendor,
 };
 
 static const struct udevice_id cpu_x86_baytrail_ids[] = {
@@ -203,4 +203,5 @@ U_BOOT_DRIVER(cpu_x86_baytrail_drv) = {
        .bind           = cpu_x86_bind,
        .probe          = cpu_x86_baytrail_probe,
        .ops            = &cpu_x86_baytrail_ops,
+       .flags          = DM_FLAG_PRE_RELOC,
 };