depends on X86_RESET_VECTOR
default 0xfffff800
+config DM_PCI_COMPAT
+ default y # Until we finish moving over to the new API
+
config BOARD_ROMSIZE_KB_512
bool
config BOARD_ROMSIZE_KB_1024
help
Additional size of malloc() pool before relocation.
+config FSP_USE_UPD
+ bool
+ depends on HAVE_FSP
+ default y
+ help
+ Most FSPs use UPD data region for some FSP customization. But there
+ are still some FSPs that might not even have UPD. For such FSPs,
+ override this to n in their platform Kconfig files.
+
config ENABLE_MRC_CACHE
bool "Enable MRC cache"
depends on !EFI && !SYS_COREBOOT
the memory used by this initialisation process. Typically 4KB is
enough space.
-config TSC_CALIBRATION_BYPASS
- bool "Bypass Time-Stamp Counter (TSC) calibration"
- default n
- help
- By default U-Boot automatically calibrates Time-Stamp Counter (TSC)
- running frequency via Model-Specific Register (MSR) and Programmable
- Interval Timer (PIT). If the calibration does not work on your board,
- select this option and provide a hardcoded TSC running frequency with
- CONFIG_TSC_FREQ_IN_MHZ below.
-
- Normally this option should be turned on in a simulation environment
- like qemu.
-
-config TSC_FREQ_IN_MHZ
- int "Time-Stamp Counter (TSC) running frequency in MHz"
- depends on TSC_CALIBRATION_BYPASS
- default 1000
- help
- The running frequency in MHz of Time-Stamp Counter (TSC).
-
config HAVE_VGA_BIOS
bool "Add a VGA BIOS image"
help
by the operating system. It defines platform-independent interfaces
for configuration and power management monitoring.
+config QEMU_ACPI_TABLE
+ bool "Load ACPI table from QEMU fw_cfg interface"
+ depends on GENERATE_ACPI_TABLE && QEMU
+ default y
+ help
+ By default, U-Boot generates its own ACPI tables. This option, if
+ enabled, disables U-Boot's version and loads ACPI tables generated
+ by QEMU.
+
config GENERATE_SMBIOS_TABLE
bool "Generate an SMBIOS (System Management BIOS) table"
default y
so a default 0x10000000 size covers all of the 256 buses which is the
maximum number of PCI buses as defined by the PCI specification.
+config I8259_PIC
+ bool
+ default y
+ help
+ Intel 8259 ISA compatible chipset incorporates two 8259 (master and
+ slave) interrupt controllers. Include this to have U-Boot set up
+ the interrupt correctly.
+
+config I8254_TIMER
+ bool
+ default y
+ help
+ Intel 8254 timer contains three counters which have fixed uses.
+ Include this to have U-Boot set up the timer correctly.
+
+config I8042_KEYB
+ default y
+
+config DM_KEYBOARD
+ default y
+
source "arch/x86/lib/efi/Kconfig"
endmenu