config SYS_ARCH
default "x86"
-config USE_PRIVATE_LIBGCC
- default y
-
-config SYS_VSNPRINTF
- default y
-
choice
prompt "Mainboard vendor"
default VENDOR_EMULATION
config VENDOR_COREBOOT
bool "coreboot"
+config VENDOR_EFI
+ bool "efi"
+
config VENDOR_EMULATION
bool "emulation"
# board-specific options below
source "board/coreboot/Kconfig"
+source "board/efi/Kconfig"
source "board/emulation/Kconfig"
source "board/google/Kconfig"
source "board/intel/Kconfig"
bool
default n
+config RESET_SEG_START
+ hex
+ depends on X86_RESET_VECTOR
+ default 0xffff0000
+
+config RESET_SEG_SIZE
+ hex
+ depends on X86_RESET_VECTOR
+ default 0x10000
+
+config RESET_VEC_LOC
+ hex
+ depends on X86_RESET_VECTOR
+ default 0xfffffff0
+
config SYS_X86_START16
hex
depends on X86_RESET_VECTOR
default 0xfffff800
+config DM_PCI_COMPAT
+ default y # Until we finish moving over to the new API
+
config BOARD_ROMSIZE_KB_512
bool
config BOARD_ROMSIZE_KB_1024
to work correctly. It is not exhaustive but can save time by
detecting obvious failures.
-config MARK_GRAPHICS_MEM_WRCOMB
- bool "Mark graphics memory as write-combining"
- default n
- help
- The graphics performance may increase if the graphics
- memory is set as write-combining cache type. This option
- enables marking the graphics memory as write-combining.
-
config HAVE_FSP
bool "Add an Firmware Support Package binary"
+ depends on !EFI
help
Select this option to add an Firmware Support Package binary to
the resulting U-Boot image. It is a binary blob which U-Boot uses
depends on HAVE_FSP
default 0x2000000
help
- Stack top address which is used in FspInit after DRAM is ready and
+ Stack top address which is used in fsp_init() after DRAM is ready and
CAR is disabled.
-config MAX_CPUS
- int "Maximum number of CPUs permitted"
- default 4
- help
- When using multi-CPU chips it is possible for U-Boot to start up
- more than one CPU. The stack memory used by all of these CPUs is
- pre-allocated so at present U-Boot wants to know the maximum
- number of CPUs that may be present. Set this to at least as high
- as the number of CPUs in your system (it uses about 4KB of RAM for
- each CPU).
+config FSP_SYS_MALLOC_F_LEN
+ hex
+ depends on HAVE_FSP
+ default 0x100000
+ help
+ Additional size of malloc() pool before relocation.
+
+config FSP_USE_UPD
+ bool
+ depends on HAVE_FSP
+ default y
+ help
+ Most FSPs use UPD data region for some FSP customization. But there
+ are still some FSPs that might not even have UPD. For such FSPs,
+ override this to n in their platform Kconfig files.
+
+config ENABLE_MRC_CACHE
+ bool "Enable MRC cache"
+ depends on !EFI && !SYS_COREBOOT
+ help
+ Enable this feature to cause MRC data to be cached in NV storage
+ to be used for speeding up boot time on future reboots and/or
+ power cycles.
config SMP
bool "Enable Symmetric Multiprocessing"
only one CPU will be enabled regardless of the number of CPUs
available.
+config MAX_CPUS
+ int "Maximum number of CPUs permitted"
+ depends on SMP
+ default 4
+ help
+ When using multi-CPU chips it is possible for U-Boot to start up
+ more than one CPU. The stack memory used by all of these CPUs is
+ pre-allocated so at present U-Boot wants to know the maximum
+ number of CPUs that may be present. Set this to at least as high
+ as the number of CPUs in your system (it uses about 4KB of RAM for
+ each CPU).
+
config AP_STACK_SIZE
hex
+ depends on SMP
default 0x1000
help
Each additional CPU started by U-Boot requires its own stack. This
the memory used by this initialisation process. Typically 4KB is
enough space.
-config TSC_CALIBRATION_BYPASS
- bool "Bypass Time-Stamp Counter (TSC) calibration"
- default n
+config HAVE_VGA_BIOS
+ bool "Add a VGA BIOS image"
help
- By default U-Boot automatically calibrates Time-Stamp Counter (TSC)
- running frequency via Model-Specific Register (MSR) and Programmable
- Interval Timer (PIT). If the calibration does not work on your board,
- select this option and provide a hardcoded TSC running frequency with
- CONFIG_TSC_FREQ_IN_MHZ below.
+ Select this option if you have a VGA BIOS image that you would
+ like to add to your ROM.
- Normally this option should be turned on in a simulation environment
- like qemu.
+config VGA_BIOS_FILE
+ string "VGA BIOS image filename"
+ depends on HAVE_VGA_BIOS
+ default "vga.bin"
+ help
+ The filename of the VGA BIOS image in the board directory.
-config TSC_FREQ_IN_MHZ
- int "Time-Stamp Counter (TSC) running frequency in MHz"
- depends on TSC_CALIBRATION_BYPASS
- default 1000
+config VGA_BIOS_ADDR
+ hex "VGA BIOS image location"
+ depends on HAVE_VGA_BIOS
+ default 0xfff90000
help
- The running frequency in MHz of Time-Stamp Counter (TSC).
+ The location of VGA BIOS image in the SPI flash. For example, base
+ address of 0xfff90000 indicates that the image will be put at offset
+ 0x90000 from the beginning of a 1MB flash device.
menu "System tables"
+ depends on !EFI && !SYS_COREBOOT
config GENERATE_PIRQ_TABLE
bool "Generate a PIRQ table"
For more information, see http://simplefirmware.org
+config GENERATE_MP_TABLE
+ bool "Generate an MP (Multi-Processor) table"
+ default n
+ help
+ Generate an MP (Multi-Processor) table for this board. The MP table
+ provides a way for the operating system to support for symmetric
+ multiprocessing as well as symmetric I/O interrupt handling with
+ the local APIC and I/O APIC.
+
+config GENERATE_ACPI_TABLE
+ bool "Generate an ACPI (Advanced Configuration and Power Interface) table"
+ default n
+ help
+ The Advanced Configuration and Power Interface (ACPI) specification
+ provides an open standard for device configuration and management
+ by the operating system. It defines platform-independent interfaces
+ for configuration and power management monitoring.
+
+config QEMU_ACPI_TABLE
+ bool "Load ACPI table from QEMU fw_cfg interface"
+ depends on GENERATE_ACPI_TABLE && QEMU
+ default y
+ help
+ By default, U-Boot generates its own ACPI tables. This option, if
+ enabled, disables U-Boot's version and loads ACPI tables generated
+ by QEMU.
+
+config GENERATE_SMBIOS_TABLE
+ bool "Generate an SMBIOS (System Management BIOS) table"
+ default y
+ help
+ The System Management BIOS (SMBIOS) specification addresses how
+ motherboard and system vendors present management information about
+ their products in a standard format by extending the BIOS interface
+ on Intel architecture systems.
+
+ Check http://www.dmtf.org/standards/smbios for details.
+
endmenu
config MAX_PIRQ_LINKS
assigned to PCI devices - i.e. the memory and prefetch regions, as
passed to pci_set_region().
-config BOOTSTAGE
+config PCIE_ECAM_SIZE
+ hex
+ default 0x10000000
+ help
+ This is the size of memory-mapped address of PCI configuration space,
+ which is only available through the Enhanced Configuration Access
+ Mechanism (ECAM) with PCI Express. Each bus consumes 1 MiB memory,
+ so a default 0x10000000 size covers all of the 256 buses which is the
+ maximum number of PCI buses as defined by the PCI specification.
+
+config I8259_PIC
+ bool
default y
+ help
+ Intel 8259 ISA compatible chipset incorporates two 8259 (master and
+ slave) interrupt controllers. Include this to have U-Boot set up
+ the interrupt correctly.
-config BOOTSTAGE_REPORT
+config I8254_TIMER
+ bool
default y
+ help
+ Intel 8254 timer contains three counters which have fixed uses.
+ Include this to have U-Boot set up the timer correctly.
-config CMD_BOOTSTAGE
+config I8042_KEYB
default y
+config DM_KEYBOARD
+ default y
+
+source "arch/x86/lib/efi/Kconfig"
+
endmenu
projects / oweals / u-boot.git / blobdiff