Merge branch 'master' of git://git.denx.de/u-boot-atmel

[oweals/u-boot.git] / arch / x86 / Kconfig

diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 4f5ce38d6f31ada28c07e7d83746b70992d478ef..90e828a26ee4b02290724868cceec5b6683a71b3 100644 (file)
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -32,19 +32,25 @@ config TARGET_CHROMEBOOK_LINK
          and it provides a 2560x1700 high resolution touch-enabled LCD
          display.
 
+config TARGET_CROWNBAY
+       bool "Support Intel Crown Bay CRB"
+       help
+         This is the Intel Crown Bay Customer Reference Board. It contains
+         the Intel Atom Processor E6xx populated on the COM Express module
+         with 1GB DDR2 soldered down memory and a carrier board with the
+         Intel Platform Controller Hub EG20T, other system components and
+         peripheral connectors for PCIe/SATA/USB/LAN/SD/UART/Audio/LVDS.
+
 endchoice
 
 config RAMBASE
        hex
        default 0x100000
 
-config RAMTOP
-       hex
-       default 0x200000
-
 config XIP_ROM_SIZE
        hex
-       default 0x10000
+       depends on X86_RESET_VECTOR
+       default ROM_SIZE
 
 config CPU_ADDR_BITS
        int
@@ -61,9 +67,95 @@ config SMM_TSEG
 config SMM_TSEG_SIZE
        hex
 
+config X86_RESET_VECTOR
+       bool
+       default n
+
+config SYS_X86_START16
+       hex
+       depends on X86_RESET_VECTOR
+       default 0xfffff800
+
+config BOARD_ROMSIZE_KB_512
+       bool
+config BOARD_ROMSIZE_KB_1024
+       bool
+config BOARD_ROMSIZE_KB_2048
+       bool
+config BOARD_ROMSIZE_KB_4096
+       bool
+config BOARD_ROMSIZE_KB_8192
+       bool
+config BOARD_ROMSIZE_KB_16384
+       bool
+
+choice
+       prompt "ROM chip size"
+       depends on X86_RESET_VECTOR
+       default UBOOT_ROMSIZE_KB_512 if BOARD_ROMSIZE_KB_512
+       default UBOOT_ROMSIZE_KB_1024 if BOARD_ROMSIZE_KB_1024
+       default UBOOT_ROMSIZE_KB_2048 if BOARD_ROMSIZE_KB_2048
+       default UBOOT_ROMSIZE_KB_4096 if BOARD_ROMSIZE_KB_4096
+       default UBOOT_ROMSIZE_KB_8192 if BOARD_ROMSIZE_KB_8192
+       default UBOOT_ROMSIZE_KB_16384 if BOARD_ROMSIZE_KB_16384
+       help
+         Select the size of the ROM chip you intend to flash U-Boot on.
+
+         The build system will take care of creating a u-boot.rom file
+         of the matching size.
+
+config UBOOT_ROMSIZE_KB_512
+       bool "512 KB"
+       help
+         Choose this option if you have a 512 KB ROM chip.
+
+config UBOOT_ROMSIZE_KB_1024
+       bool "1024 KB (1 MB)"
+       help
+         Choose this option if you have a 1024 KB (1 MB) ROM chip.
+
+config UBOOT_ROMSIZE_KB_2048
+       bool "2048 KB (2 MB)"
+       help
+         Choose this option if you have a 2048 KB (2 MB) ROM chip.
+
+config UBOOT_ROMSIZE_KB_4096
+       bool "4096 KB (4 MB)"
+       help
+         Choose this option if you have a 4096 KB (4 MB) ROM chip.
+
+config UBOOT_ROMSIZE_KB_8192
+       bool "8192 KB (8 MB)"
+       help
+         Choose this option if you have a 8192 KB (8 MB) ROM chip.
+
+config UBOOT_ROMSIZE_KB_16384
+       bool "16384 KB (16 MB)"
+       help
+         Choose this option if you have a 16384 KB (16 MB) ROM chip.
+
+endchoice
+
+# Map the config names to an integer (KB).
+config UBOOT_ROMSIZE_KB
+       int
+       default 512 if UBOOT_ROMSIZE_KB_512
+       default 1024 if UBOOT_ROMSIZE_KB_1024
+       default 2048 if UBOOT_ROMSIZE_KB_2048
+       default 4096 if UBOOT_ROMSIZE_KB_4096
+       default 8192 if UBOOT_ROMSIZE_KB_8192
+       default 16384 if UBOOT_ROMSIZE_KB_16384
+
+# Map the config names to a hex value (bytes).
 config ROM_SIZE
        hex
-       default 0x800000
+       default 0x80000 if UBOOT_ROMSIZE_KB_512
+       default 0x100000 if UBOOT_ROMSIZE_KB_1024
+       default 0x200000 if UBOOT_ROMSIZE_KB_2048
+       default 0x400000 if UBOOT_ROMSIZE_KB_4096
+       default 0x800000 if UBOOT_ROMSIZE_KB_8192
+       default 0xc00000 if UBOOT_ROMSIZE_KB_12288
+       default 0x1000000 if UBOOT_ROMSIZE_KB_16384
 
 config HAVE_INTEL_ME
        bool "Platform requires Intel Management Engine"
@@ -232,10 +324,36 @@ config FRAMEBUFFER_VESA_MODE
 
 endmenu
 
+config TSC_CALIBRATION_BYPASS
+       bool "Bypass Time-Stamp Counter (TSC) calibration"
+       default n
+       help
+         By default U-Boot automatically calibrates Time-Stamp Counter (TSC)
+         running frequency via Model-Specific Register (MSR) and Programmable
+         Interval Timer (PIT). If the calibration does not work on your board,
+         select this option and provide a hardcoded TSC running frequency with
+         CONFIG_TSC_FREQ_IN_MHZ below.
+
+         Normally this option should be turned on in a simulation environment
+         like qemu.
+
+config TSC_FREQ_IN_MHZ
+       int "Time-Stamp Counter (TSC) running frequency in MHz"
+       depends on TSC_CALIBRATION_BYPASS
+       default 1000
+       help
+         The running frequency in MHz of Time-Stamp Counter (TSC).
+
+source "arch/x86/cpu/coreboot/Kconfig"
+
 source "arch/x86/cpu/ivybridge/Kconfig"
 
+source "arch/x86/cpu/queensbay/Kconfig"
+
 source "board/coreboot/coreboot/Kconfig"
 
 source "board/google/chromebook_link/Kconfig"
 
+source "board/intel/crownbay/Kconfig"
+
 endmenu