config X86_RESET_VECTOR
bool
default n
+ select BINMAN
# The following options control where the 16-bit and 32-bit init lies
# If SPL is enabled then it normally holds this init code, and U-Boot proper
do not overwrite the important boot service data which is used by
FSP, otherwise the subsequent call to fsp_notify() will fail.
-config FSP_LOCKDOWN_SPI
- bool
- depends on HAVE_FSP
- help
- Some Intel FSP (like Braswell) does SPI lock-down during the call
- to fsp_notify(INIT_PHASE_BOOT). This option should be turned on
- for such FSP and U-Boot will configure the SPI opcode registers
- before the lock-down.
-
config ENABLE_MRC_CACHE
bool "Enable MRC cache"
depends on !EFI && !SYS_COREBOOT
config HAVE_ACPI_RESUME
bool "Enable ACPI S3 resume"
+ select ENABLE_MRC_CACHE
help
Select this to enable ACPI S3 resume. S3 is an ACPI-defined sleeping
state where all system context is lost except system memory. U-Boot