x86: fsp: Add FSP2 base support

[oweals/u-boot.git] / arch / x86 / Kconfig

diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 17a6fe6d3d92e73a27424112686ce3833982c21b..e2e0f20f213288724a0c6fd9b80ea9c0c6d9411e 100644 (file)
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -326,7 +326,7 @@ config X86_RAMTEST
 
 config FLASH_DESCRIPTOR_FILE
        string "Flash descriptor binary filename"
-       depends on HAVE_INTEL_ME
+       depends on HAVE_INTEL_ME || FSP_VERSION2
        default "descriptor.bin"
        help
          The filename of the file to use as flash descriptor in the
@@ -411,6 +411,54 @@ config FSP_ADDR
          The default base address of 0xfffc0000 indicates that the binary must
          be located at offset 0xc0000 from the beginning of a 1MB flash device.
 
+if FSP_VERSION2
+
+config FSP_FILE_T
+       string "Firmware Support Package binary filename (Temp RAM)"
+       default "fsp_t.bin"
+       help
+         The filename of the file to use for the temporary-RAM init phase from
+         the Firmware Support Package binary. Put this in the board directory.
+         It is used to set up an initial area of RAM which can be used for the
+         stack and other purposes, while bringing up the main system DRAM.
+
+config FSP_ADDR_T
+       hex "Firmware Support Package binary location (Temp RAM)"
+       default 0xffff8000
+       help
+         FSP is not Position-Independent Code (PIC) and FSP components have to
+         be rebased if placed at a location which is different from the
+         perferred base address specified during the FSP build. Use Intel's
+         Binary Configuration Tool (BCT) to do the rebase.
+
+config FSP_FILE_M
+       string "Firmware Support Package binary filename (Memory Init)"
+       default "fsp_m.bin"
+       help
+         The filename of the file to use for the RAM init phase from the
+         Firmware Support Package binary. Put this in the board directory.
+         It is used to set up the main system DRAM and runs in SPL, once
+         temporary RAM (CAR) is working.
+
+config FSP_FILE_S
+       string "Firmware Support Package binary filename (Silicon Init)"
+       default "fsp_s.bin"
+       help
+         The filename of the file to use for the Silicon init phase from the
+         Firmware Support Package binary. Put this in the board directory.
+         It is used to set up the silicon to work correctly and must be
+         executed after DRAM is running.
+
+config IFWI_INPUT_FILE
+       string "Filename containing FIT (Firmware Interface Table) with IFWI"
+       default "fitimage.bin"
+       help
+         The IFWI is obtained by running a tool on this file to extract the
+         IFWI. Put this in the board directory. The IFWI contains U-Boot TPL,
+         microcode and other internal items.
+
+endif
+
 config FSP_TEMP_RAM_ADDR
        hex
        depends on FSP_VERSION1
@@ -595,7 +643,7 @@ config VGA_BIOS_ADDR
 
 config HAVE_VBT
        bool "Add a Video BIOS Table (VBT) image"
-       depends on FSP_VERSION1
+       depends on HAVE_FSP
        help
          Select this option if you have a Video BIOS Table (VBT) image that
          you would like to add to your ROM. This is normally required if you