Merge tag 'u-boot-atmel-fixes-2019.07-a' of git://git.denx.de/u-boot-atmel

[oweals/u-boot.git] / arch / sh / lib / time.c

diff --git a/arch/sh/lib/time.c b/arch/sh/lib/time.c
index a650c9478c867a14ef769b2d576ed81139a34191..51e1cc1181c06be7edda98f52801f2a9a0c6bf41 100644 (file)
--- a/arch/sh/lib/time.c
+++ b/arch/sh/lib/time.c
@@ -14,72 +14,19 @@
 #include <asm/processor.h>
 #include <asm/io.h>
 
-#if defined(CONFIG_CPU_SH3)
-struct tmu_regs {
-       u8      tocr;
-       u8      reserved0;
-       u8      tstr;
-       u8      reserved1;
-       u32     tcor0;
-       u32     tcnt0;
-       u16     tcr0;
-       u16     reserved2;
-       u32     tcor1;
-       u32     tcnt1;
-       u16     tcr1;
-       u16     reserved3;
-       u32     tcor2;
-       u32     tcnt2;
-       u16     tcr2;
-       u16     reserved4;
-       u32     tcpr2;
-};
-#endif /* CONFIG_CPU_SH3 */
-
 #if defined(CONFIG_CPU_SH4) || defined(CONFIG_ARCH_RMOBILE)
-struct tmu_regs {
-       u32     reserved;
-       u8      tstr;
-       u8      reserved2[3];
-       u32     tcor0;
-       u32     tcnt0;
-       u16     tcr0;
-       u16     reserved3;
-       u32     tcor1;
-       u32     tcnt1;
-       u16     tcr1;
-       u16     reserved4;
-       u32     tcor2;
-       u32     tcnt2;
-       u16     tcr2;
-       u16     reserved5;
-};
+#define TSTR   0x4
+#define TCR0   0x10
 #endif /* CONFIG_CPU_SH4 */
 
-#define TCR_TPSC 0x07
+#define TCR_TPSC       0x07
 #define TSTR_STR0      BIT(0)
 
-static struct tmu_regs *tmu = (struct tmu_regs *)TMU_BASE;
-
-unsigned long get_tbclk(void)
-{
-#ifdef CONFIG_RCAR_GEN2
-       return CONFIG_SYS_CLK_FREQ / 8;
-#else
-       return CONFIG_SYS_CLK_FREQ / 4;
-#endif
-}
-
-unsigned long timer_read_counter(void)
-{
-       return ~readl(&tmu->tcnt0);
-}
-
 int timer_init(void)
 {
-       writew(readw(&tmu->tcr0) & ~TCR_TPSC, &tmu->tcr0);
-       writeb(readb(&tmu->tstr) & ~TSTR_STR0, &tmu->tstr);
-       writeb(readb(&tmu->tstr) | TSTR_STR0, &tmu->tstr);
+       writew(readw(TMU_BASE + TCR0) & ~TCR_TPSC, TMU_BASE + TCR0);
+       writeb(readb(TMU_BASE + TSTR) & ~TSTR_STR0, TMU_BASE + TSTR);
+       writeb(readb(TMU_BASE + TSTR) | TSTR_STR0, TMU_BASE + TSTR);
 
        return 0;
 }