Merge tag 'efi-2020-07-rc6' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi

[oweals/u-boot.git] / arch / riscv / include / asm / encoding.h

diff --git a/arch/riscv/include/asm/encoding.h b/arch/riscv/include/asm/encoding.h
index 9ea50ce64079cdd14e7585f42872e4bafb3bb4f5..edafad36b38ddb0f4f2a9ffbc66ad17260858f0f 100644 (file)
--- a/arch/riscv/include/asm/encoding.h
+++ b/arch/riscv/include/asm/encoding.h
@@ -7,6 +7,17 @@
 #ifndef RISCV_CSR_ENCODING_H
 #define RISCV_CSR_ENCODING_H
 
+#include <asm/csr.h>
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
+#if CONFIG_IS_ENABLED(RISCV_SMODE)
+#define MODE_PREFIX(__suffix)  s##__suffix
+#else
+#define MODE_PREFIX(__suffix)  m##__suffix
+#endif
+
 #define MSTATUS_UIE    0x00000001
 #define MSTATUS_SIE    0x00000002
 #define MSTATUS_HIE    0x00000004
@@ -43,13 +54,10 @@
 #define SSTATUS64_SD   0x8000000000000000
 
 #define MIP_SSIP       BIT(IRQ_S_SOFT)
-#define MIP_HSIP       BIT(IRQ_H_SOFT)
 #define MIP_MSIP       BIT(IRQ_M_SOFT)
 #define MIP_STIP       BIT(IRQ_S_TIMER)
-#define MIP_HTIP       BIT(IRQ_H_TIMER)
 #define MIP_MTIP       BIT(IRQ_M_TIMER)
 #define MIP_SEIP       BIT(IRQ_S_EXT)
-#define MIP_HEIP       BIT(IRQ_H_EXT)
 #define MIP_MEIP       BIT(IRQ_M_EXT)
 
 #define SIP_SSIP       MIP_SSIP
@@ -67,17 +75,20 @@
 #define VM_SV39                9
 #define VM_SV48                10
 
-#define IRQ_S_SOFT     1
-#define IRQ_H_SOFT     2
-#define IRQ_M_SOFT     3
-#define IRQ_S_TIMER    5
-#define IRQ_H_TIMER    6
-#define IRQ_M_TIMER    7
-#define IRQ_S_EXT      9
-#define IRQ_H_EXT      10
-#define IRQ_M_EXT      11
-#define IRQ_COP                12
-#define IRQ_HOST       13
+#define CAUSE_MISALIGNED_FETCH         0
+#define CAUSE_FETCH_ACCESS             1
+#define CAUSE_ILLEGAL_INSTRUCTION      2
+#define CAUSE_BREAKPOINT               3
+#define CAUSE_MISALIGNED_LOAD          4
+#define CAUSE_LOAD_ACCESS              5
+#define CAUSE_MISALIGNED_STORE         6
+#define CAUSE_STORE_ACCESS             7
+#define CAUSE_USER_ECALL               8
+#define CAUSE_SUPERVISOR_ECALL         9
+#define CAUSE_MACHINE_ECALL            11
+#define CAUSE_FETCH_PAGE_FAULT         12
+#define CAUSE_LOAD_PAGE_FAULT          13
+#define CAUSE_STORE_PAGE_FAULT         15
 
 #define DEFAULT_RSTVEC         0x00001000
 #define DEFAULT_NMIVEC         0x00001004