Merge git://git.denx.de/u-boot-fsl-qoriq

[oweals/u-boot.git] / arch / powerpc / include / asm / fsl_law.h

diff --git a/arch/powerpc/include/asm/fsl_law.h b/arch/powerpc/include/asm/fsl_law.h
index 3b504875e0f9db26134751827d5a20dcaa045af0..b348cc1f208b463cb2931db2d923f4469516a67d 100644 (file)
--- a/arch/powerpc/include/asm/fsl_law.h
+++ b/arch/powerpc/include/asm/fsl_law.h
@@ -1,15 +1,14 @@
 /*
  * Copyright 2008-2011 Freescale Semiconductor, Inc.
  *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * Version 2 as published by the Free Software Foundation.
+ * SPDX-License-Identifier:    GPL-2.0
  */
 
 #ifndef _FSL_LAW_H_
 #define _FSL_LAW_H_
 
 #include <asm/io.h>
+#include <linux/log2.h>
 
 #define LAW_EN 0x80000000
 
@@ -80,13 +79,13 @@ enum law_trgt_if {
 enum law_trgt_if {
        LAW_TRGT_IF_PCI = 0x00,
        LAW_TRGT_IF_PCI_2 = 0x01,
-#ifndef CONFIG_MPC8641
+#ifndef CONFIG_ARCH_MPC8641
        LAW_TRGT_IF_PCIE_1 = 0x02,
 #endif
-#if defined(CONFIG_BSC9131) || defined(CONFIG_BSC9132)
+#if defined(CONFIG_ARCH_BSC9131) || defined(CONFIG_ARCH_BSC9132)
        LAW_TRGT_IF_OCN_DSP = 0x03,
 #else
-#if !defined(CONFIG_MPC8572) && !defined(CONFIG_P2020)
+#if !defined(CONFIG_ARCH_MPC8572) && !defined(CONFIG_ARCH_P2020)
        LAW_TRGT_IF_PCIE_3 = 0x03,
 #endif
 #endif
@@ -96,7 +95,7 @@ enum law_trgt_if {
        LAW_TRGT_IF_PLATFORM_SRAM = 0x0a,
        LAW_TRGT_IF_DDR_INTRLV = 0x0b,
        LAW_TRGT_IF_RIO = 0x0c,
-#if defined(CONFIG_BSC9132)
+#if defined(CONFIG_ARCH_BSC9132)
        LAW_TRGT_IF_CLASS_DSP = 0x0d,
 #else
        LAW_TRGT_IF_RIO_2 = 0x0d,
@@ -118,11 +117,11 @@ enum law_trgt_if {
 #define LAW_TRGT_IF_RIO_1      LAW_TRGT_IF_RIO
 #define LAW_TRGT_IF_IFC                LAW_TRGT_IF_LBC
 
-#ifdef CONFIG_MPC8641
+#ifdef CONFIG_ARCH_MPC8641
 #define LAW_TRGT_IF_PCIE_1     LAW_TRGT_IF_PCI
 #endif
 
-#if defined(CONFIG_MPC8572) || defined(CONFIG_P2020)
+#if defined(CONFIG_ARCH_MPC8572) || defined(CONFIG_ARCH_P2020)
 #define LAW_TRGT_IF_PCIE_3     LAW_TRGT_IF_PCI
 #endif
 #endif /* CONFIG_FSL_CORENET */