common: Move hang() to the same header as panic()

[oweals/u-boot.git] / arch / powerpc / dts / p1020-post.dtsi

diff --git a/arch/powerpc/dts/p1020-post.dtsi b/arch/powerpc/dts/p1020-post.dtsi
index e1a4f500a678fb7d3e7840e1ccfeeb320578ec96..1c77702f01e772686d440909cffc976cc20553fb 100644 (file)
--- a/arch/powerpc/dts/p1020-post.dtsi
+++ b/arch/powerpc/dts/p1020-post.dtsi
@@ -13,6 +13,18 @@
        compatible = "fsl,p1020-immr", "simple-bus";
        bus-frequency = <0x0>;
 
+       usb@22000 {
+               compatible = "fsl-usb2-dr";
+               reg = <0x22000 0x1000>;
+               phy_type = "ulpi";
+       };
+
+       usb@23000 {
+               compatible = "fsl-usb2-dr";
+               reg = <0x23000 0x1000>;
+               phy_type = "ulpi";
+       };
+
        mpic: pic@40000 {
                interrupt-controller;
                #address-cells = <0>;
@@ -24,4 +36,32 @@
                single-cpu-affinity;
                last-interrupt-source = <255>;
        };
+
+       esdhc: esdhc@2e000 {
+               compatible = "fsl,esdhc";
+               reg = <0x2e000 0x1000>;
+               /* Filled in by U-Boot */
+               clock-frequency = <0>;
+       };
+
+};
+
+/* PCIe controller base address 0x9000 */
+&pci1 {
+       compatible = "fsl,pcie-p1_p2", "fsl,pcie-fsl-qoriq";
+       law_trgt_if = <1>;
+       #address-cells = <3>;
+       #size-cells = <2>;
+       device_type = "pci";
+       bus-range = <0x0 0xff>;
+};
+
+/* PCIe controller base address 0xa000 */
+&pci0 {
+       compatible = "fsl,pcie-p1_p2", "fsl,pcie-fsl-qoriq";
+       law_trgt_if = <2>;
+       #address-cells = <3>;
+       #size-cells = <2>;
+       device_type = "pci";
+       bus-range = <0x0 0xff>;
 };