powerpc/mpc85xx: T104x: Add nand secure boot target

[oweals/u-boot.git] / arch / powerpc / cpu / ppc4xx / denali_data_eye.c

diff --git a/arch/powerpc/cpu/ppc4xx/denali_data_eye.c b/arch/powerpc/cpu/ppc4xx/denali_data_eye.c
index 03b8d3c614e21a9d794b21420e4004568f4d6dd6..a955a5ba6329ca2ab74aa8e5a16b90ed7c8eac1b 100644 (file)
--- a/arch/powerpc/cpu/ppc4xx/denali_data_eye.c
+++ b/arch/powerpc/cpu/ppc4xx/denali_data_eye.c
@@ -12,20 +12,7 @@
  * (C) Copyright 2006-2007
  * Stefan Roese, DENX Software Engineering, sr@denx.de.
  *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 /* define DEBUG for debugging output (obviously ;-)) */
@@ -36,7 +23,7 @@
 #include <common.h>
 #include <asm/processor.h>
 #include <asm/io.h>
-#include <ppc4xx.h>
+#include <asm/ppc4xx.h>
 
 #if defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
 /*-----------------------------------------------------------------------------+
@@ -317,7 +304,7 @@ void denali_core_search_data_eye(void)
        val = (mfdcr(ddrcfgd) & ~DDR0_09_WR_DQS_SHIFT_MASK)
            | DDR0_09_WR_DQS_SHIFT_ENCODE(wr_dqs_shift);
        mtdcr(ddrcfgd, val);
-       debug("DDR0_09=0x%08lx\n", val);
+       debug("DDR0_09=0x%08x\n", val);
 
        /* -----------------------------------------------------------+
         * Set 'dqs_out_shift' = wr_dqs_shift + 32
@@ -327,7 +314,7 @@ void denali_core_search_data_eye(void)
        val = (mfdcr(ddrcfgd) & ~DDR0_22_DQS_OUT_SHIFT_MASK)
            | DDR0_22_DQS_OUT_SHIFT_ENCODE(dqs_out_shift);
        mtdcr(ddrcfgd, val);
-       debug("DDR0_22=0x%08lx\n", val);
+       debug("DDR0_22=0x%08x\n", val);
 
        /* -----------------------------------------------------------+
         * Set 'dll_dqs_delay_X'.
@@ -337,7 +324,7 @@ void denali_core_search_data_eye(void)
        val = (mfdcr(ddrcfgd) & ~DDR0_17_DLL_DQS_DELAY_0_MASK)
            | DDR0_17_DLL_DQS_DELAY_0_ENCODE(dll_dqs_delay_X);
        mtdcr(ddrcfgd, val);
-       debug("DDR0_17=0x%08lx\n", val);
+       debug("DDR0_17=0x%08x\n", val);
 
        /* dll_dqs_delay_1 to dll_dqs_delay_4 */
        mtdcr(ddrcfga, DDR0_18);
@@ -347,7 +334,7 @@ void denali_core_search_data_eye(void)
            | DDR0_18_DLL_DQS_DELAY_2_ENCODE(dll_dqs_delay_X)
            | DDR0_18_DLL_DQS_DELAY_1_ENCODE(dll_dqs_delay_X);
        mtdcr(ddrcfgd, val);
-       debug("DDR0_18=0x%08lx\n", val);
+       debug("DDR0_18=0x%08x\n", val);
 
        /* dll_dqs_delay_5 to dll_dqs_delay_8 */
        mtdcr(ddrcfga, DDR0_19);
@@ -357,7 +344,7 @@ void denali_core_search_data_eye(void)
            | DDR0_19_DLL_DQS_DELAY_6_ENCODE(dll_dqs_delay_X)
            | DDR0_19_DLL_DQS_DELAY_5_ENCODE(dll_dqs_delay_X);
        mtdcr(ddrcfgd, val);
-       debug("DDR0_19=0x%08lx\n", val);
+       debug("DDR0_19=0x%08x\n", val);
 
        /* -----------------------------------------------------------+
         * Assert 'start' parameter.