Merge tag 'ti-v2020.07-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-ti

[oweals/u-boot.git] / arch / powerpc / cpu / mpc85xx / p1021_serdes.c

diff --git a/arch/powerpc/cpu/mpc85xx/p1021_serdes.c b/arch/powerpc/cpu/mpc85xx/p1021_serdes.c
index 99a77bd2b63ed4188c35349b5e290f635fc3e636..6b8e447e94a4281daedd53d50967de73ac5327f1 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/p1021_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/p1021_serdes.c
@@ -1,14 +1,15 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright 2010-2011 Freescale Semiconductor, Inc.
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <config.h>
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/immap_85xx.h>
 #include <asm/fsl_serdes.h>
+#include <linux/delay.h>
 
 typedef struct serdes_85xx {
        u32     srdscr0;        /* 0x00 - SRDS Control Register 0 */
@@ -41,6 +42,9 @@ static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {
 
 int is_serdes_configured(enum srds_prtcl prtcl)
 {
+       if (!(serdes1_prtcl_map & (1 << NONE)))
+               fsl_serdes_init();
+
        return (1 << prtcl) & serdes1_prtcl_map;
 }
 
@@ -55,6 +59,9 @@ void fsl_serdes_init(void)
        int lane;
        u32 mask, val;
 
+       if (serdes1_prtcl_map & (1 << NONE))
+               return;
+
        debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg);
 
        if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) {
@@ -67,6 +74,9 @@ void fsl_serdes_init(void)
                serdes1_prtcl_map |= (1 << lane_prtcl);
        }
 
+       /* Set the first bit to indicate serdes has been initialized */
+       serdes1_prtcl_map |= (1 << NONE);
+
        /* Init SERDES Receiver electrical idle detection control for PCIe */
 
        /* Lane 0 is always PCIe 1 */