Merge branch 'master' of git://git.denx.de/u-boot-marvell
[oweals/u-boot.git] / arch / powerpc / cpu / mpc85xx / fdt.c
index 932466e883d32834131dfed258c5a56085e8c065..8e7b827ffb9e1ed11c8a9bb343688378234d4f00 100644 (file)
@@ -28,6 +28,8 @@
 #include <fdt_support.h>
 #include <asm/processor.h>
 #include <linux/ctype.h>
+#include <asm/io.h>
+#include <asm/fsl_portals.h>
 #ifdef CONFIG_FSL_ESDHC
 #include <fsl_esdhc.h>
 #endif
@@ -80,7 +82,30 @@ void ft_fixup_cpu(void *blob, u64 memory_limit)
 }
 #endif
 
+#ifdef CONFIG_SYS_FSL_CPC
+static inline void ft_fixup_l3cache(void *blob, int off)
+{
+       u32 line_size, num_ways, size, num_sets;
+       cpc_corenet_t *cpc = (void *)CONFIG_SYS_FSL_CPC_ADDR;
+       u32 cfg0 = in_be32(&cpc->cpccfg0);
+
+       size = CPC_CFG0_SZ_K(cfg0) * 1024 * CONFIG_SYS_NUM_CPC;
+       num_ways = CPC_CFG0_NUM_WAYS(cfg0);
+       line_size = CPC_CFG0_LINE_SZ(cfg0);
+       num_sets = size / (line_size * num_ways);
+
+       fdt_setprop(blob, off, "cache-unified", NULL, 0);
+       fdt_setprop_cell(blob, off, "cache-block-size", line_size);
+       fdt_setprop_cell(blob, off, "cache-size", size);
+       fdt_setprop_cell(blob, off, "cache-sets", num_sets);
+       fdt_setprop_cell(blob, off, "cache-level", 3);
+#ifdef CONFIG_SYS_CACHE_STASHING
+       fdt_setprop_cell(blob, off, "cache-stash-id", 1);
+#endif
+}
+#else
 #define ft_fixup_l3cache(x, y)
+#endif
 
 #if defined(CONFIG_L2_CACHE)
 /* return size in kilobytes */
@@ -422,4 +447,18 @@ void ft_cpu_setup(void *blob, bd_t *bd)
 #endif
 
        ft_fixup_dpaa_clks(blob);
+
+#if defined(CONFIG_SYS_BMAN_MEM_PHYS)
+       fdt_portal(blob, "fsl,bman-portal", "bman-portals",
+                       (u64)CONFIG_SYS_BMAN_MEM_PHYS,
+                       CONFIG_SYS_BMAN_MEM_SIZE);
+#endif
+
+#if defined(CONFIG_SYS_QMAN_MEM_PHYS)
+       fdt_portal(blob, "fsl,qman-portal", "qman-portals",
+                       (u64)CONFIG_SYS_QMAN_MEM_PHYS,
+                       CONFIG_SYS_QMAN_MEM_SIZE);
+
+       fdt_fixup_qportals(blob);
+#endif
 }