powerpc/mpc85xx: set clock-frequency for T4/B4 clockgen node

[oweals/u-boot.git] / arch / powerpc / cpu / mpc85xx / fdt.c

diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c
index d381cf9da2aeb7c02ebd551f033aa2809425482b..288f7b28603641470d2464d8bea4f9397dd6685f 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/fdt.c
+++ b/arch/powerpc/cpu/mpc85xx/fdt.c
@@ -663,6 +663,13 @@ void ft_cpu_setup(void *blob, bd_t *bd)
 #ifdef CONFIG_FSL_CORENET
        do_fixup_by_compat_u32(blob, "fsl,qoriq-clockgen-1.0",
                "clock-frequency", CONFIG_SYS_CLK_FREQ, 1);
+       do_fixup_by_compat_u32(blob, "fsl,qoriq-clockgen-2",
+               "clock-frequency", CONFIG_SYS_CLK_FREQ, 1);
+       do_fixup_by_compat_u32(blob, "fsl,mpic",
+               "clock-frequency", get_bus_freq(0)/2, 1);
+#else
+       do_fixup_by_compat_u32(blob, "fsl,mpic",
+               "clock-frequency", get_bus_freq(0), 1);
 #endif
 
        fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
@@ -811,7 +818,7 @@ int ft_verify_fdt(void *fdt)
 #ifdef CONFIG_SYS_LBC_ADDR
        off = fdt_node_offset_by_compatible(fdt, -1, "fsl,elbc");
        if (off > 0) {
-               const u32 *reg = fdt_getprop(fdt, off, "reg", NULL);
+               const fdt32_t *reg = fdt_getprop(fdt, off, "reg", NULL);
                if (reg) {
                        uint64_t uaddr = CCSR_VIRT_TO_PHYS(CONFIG_SYS_LBC_ADDR);