Merge branch 'master' of git://git.denx.de/u-boot-tegra

[oweals/u-boot.git] / arch / powerpc / cpu / mpc512x / cpu_init.c

diff --git a/arch/powerpc/cpu/mpc512x/cpu_init.c b/arch/powerpc/cpu/mpc512x/cpu_init.c
index ac2605a53de6827135a893dbcb0eb438f42ba061..48a5e4f8b258a64cd2f9f9cd53c5af1c67347475 100644 (file)
--- a/arch/powerpc/cpu/mpc512x/cpu_init.c
+++ b/arch/powerpc/cpu/mpc512x/cpu_init.c
@@ -2,26 +2,9 @@
  * Copyright (C) 2004-2006 Freescale Semiconductor, Inc.
  * Copyright (C) 2007-2009 DENX Software Engineering
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  *
  * Derived from the MPC83xx code.
- *
  */
 
 #include <common.h>
@@ -172,6 +155,21 @@ void cpu_init_f (volatile immap_t * im)
        ips_div |= SCFR1_IPS_DIV << SCFR1_IPS_DIV_SHIFT;
        out_be32(&im->clk.scfr[0], ips_div);
 
+#ifdef SCFR1_LPC_DIV
+       clrsetbits_be32(&im->clk.scfr[0], SCFR1_LPC_DIV_MASK,
+                       SCFR1_LPC_DIV << SCFR1_LPC_DIV_SHIFT);
+#endif
+
+#ifdef SCFR1_NFC_DIV
+       clrsetbits_be32(&im->clk.scfr[0], SCFR1_NFC_DIV_MASK,
+                       SCFR1_NFC_DIV << SCFR1_NFC_DIV_SHIFT);
+#endif
+
+#ifdef SCFR1_DIU_DIV
+       clrsetbits_be32(&im->clk.scfr[0], SCFR1_DIU_DIV_MASK,
+                       SCFR1_DIU_DIV << SCFR1_DIU_DIV_SHIFT);
+#endif
+
        /*
         * Enable Time Base/Decrementer
         *
@@ -180,6 +178,15 @@ void cpu_init_f (volatile immap_t * im)
         * during FLASH chip identification etc.
         */
        setbits_be32(&im->sysconf.spcr, SPCR_TBEN);
+
+       /*
+        * Enable clocks
+        */
+       out_be32(&im->clk.sccr[0], SCCR1_CLOCKS_EN);
+       out_be32(&im->clk.sccr[1], SCCR2_CLOCKS_EN);
+#if defined(CONFIG_FSL_IIM) || defined(CONFIG_CMD_FUSE)
+       setbits_be32(&im->clk.sccr[1], CLOCK_SCCR2_IIM_EN);
+#endif
 }
 
 int cpu_init_r (void)