ARM: uniphier: support fdt_fixup_mtdparts

[oweals/u-boot.git] / arch / nds32 / dts / ae3xx.dts

diff --git a/arch/nds32/dts/ae3xx.dts b/arch/nds32/dts/ae3xx.dts
index 4221e4bf9ac01b660af1406a9b69bda82a99a079..b19ba988dbfb030ceb49a0ec47bad2a93a1f37d4 100644 (file)
--- a/arch/nds32/dts/ae3xx.dts
+++ b/arch/nds32/dts/ae3xx.dts
@@ -8,6 +8,7 @@
        aliases {
                uart0 = &serial0;
                ethernet0 = &mac0;
+               spi0 = &spi;
        } ;
 
        chosen {
@@ -22,6 +23,12 @@
                reg = <0x00000000 0x40000000>;
        };
 
+       spiclk: virt_100mhz {
+               #clock-cells = <0>;
+               compatible = "fixed-clock";
+               clock-frequency = <100000000>;
+       };
+
        cpus {
                #address-cells = <1>;
                #size-cells = <0>;
@@ -62,6 +69,14 @@
                interrupts = <25 4>;
        };
 
+       mmc0: mmc@f0e00000 {
+               compatible = "andestech,atsdc010";
+               max-frequency = <100000000>;
+               fifo-depth = <0x10>;
+               reg = <0xf0e00000 0x1000>;
+               interrupts = <17 4>;
+       };
+
        nor@0,0 {
                compatible = "cfi-flash";
                reg = <0x88000000 0x1000>;
@@ -69,4 +84,20 @@
                device-width = <1>;
        };
 
+       spi: spi@f0b00000 {
+               compatible = "andestech,atcspi200";
+               reg = <0xf0b00000 0x1000>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               num-cs = <1>;
+               clocks = <&spiclk>;
+               interrupts = <3 4>;
+                       flash@0 {
+                       compatible = "spi-flash";
+                       spi-max-frequency = <50000000>;
+                       reg = <0>;
+                       spi-cpol;
+                       spi-cpha;
+               };
+       };
 };