Merge tag 'u-boot-clk-23Oct2019' of https://gitlab.denx.de/u-boot/custodians/u-boot-clk

[oweals/u-boot.git] / arch / mips / mach-mtmips / cpu.c

diff --git a/arch/mips/mach-mtmips/cpu.c b/arch/mips/mach-mtmips/cpu.c
index fcd0484a6d871685a0e455ecdbbf3687f37c0022..7afc2c5940d3a88e3e283ba36249b4961d183a18 100644 (file)
--- a/arch/mips/mach-mtmips/cpu.c
+++ b/arch/mips/mach-mtmips/cpu.c
@@ -69,17 +69,28 @@ int print_cpuinfo(void)
        return 0;
 }
 
-int arch_misc_init(void)
+int last_stage_init(void)
 {
+       void *src, *dst;
+
+       src = malloc(SZ_64K);
+       dst = malloc(SZ_64K);
+       if (!src || !dst) {
+               printf("Can't allocate buffer for cache cleanup copy!\n");
+               return 0;
+       }
+
        /*
         * It has been noticed, that sometimes the d-cache is not in a
         * "clean-state" when U-Boot is running on MT7688. This was
         * detected when using the ethernet driver (which uses d-cache)
-        * and a TFTP command does not complete. Flushing the complete
-        * d-cache (again?) here seems to fix this issue.
+        * and a TFTP command does not complete. Copying an area of 64KiB
+        * in DDR at a very late bootup time in U-Boot, directly before
+        * calling into the prompt, seems to fix this issue.
         */
-       flush_dcache_range(gd->bd->bi_memstart,
-                          gd->bd->bi_memstart + gd->ram_size - 1);
+       memcpy(dst, src, SZ_64K);
+       free(src);
+       free(dst);
 
        return 0;
 }