Merge branch 'master' of git://git.denx.de/u-boot-mips

[oweals/u-boot.git] / arch / mips / include / asm / mipsregs.h

diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
index cd4f952df0af2419865b2aa048a8ecfdb0bfcb62..7a9d222aadecfc1ed32e91e12b46aefa49634511 100644 (file)
--- a/arch/mips/include/asm/mipsregs.h
+++ b/arch/mips/include/asm/mipsregs.h
@@ -39,6 +39,7 @@
 #define CP0_ENTRYLO0 $2
 #define CP0_ENTRYLO1 $3
 #define CP0_CONF $3
+#define CP0_GLOBALNUMBER $3, 1
 #define CP0_CONTEXT $4
 #define CP0_PAGEMASK $5
 #define CP0_WIRED $6
@@ -298,6 +299,7 @@
 #define         STATUSF_IP14           (_ULCAST_(1) <<  6)
 #define         STATUSB_IP15           7
 #define         STATUSF_IP15           (_ULCAST_(1) <<  7)
+#define ST0_IMPL               (_ULCAST_(3) <<  16)
 #define ST0_CH                 0x00040000
 #define ST0_NMI                        0x00080000
 #define ST0_SR                 0x00100000
@@ -360,6 +362,11 @@
 #define CAUSEB_BD              31
 #define CAUSEF_BD              (_ULCAST_(1)   << 31)
 
+/*
+ * Bits in the coprocessor 0 EBase register.
+ */
+#define EBASE_CPUNUM           0x3ff
+
 /*
  * Bits in the coprocessor 0 config register.
  */
@@ -485,9 +492,13 @@
 #define MIPS_CONF1_TLBS_SIZE    (6)
 #define MIPS_CONF1_TLBS         (_ULCAST_(63) << MIPS_CONF1_TLBS_SHIFT)
 
+#define MIPS_CONF2_SA_SHF      0
 #define MIPS_CONF2_SA          (_ULCAST_(15) << 0)
+#define MIPS_CONF2_SL_SHF      4
 #define MIPS_CONF2_SL          (_ULCAST_(15) << 4)
+#define MIPS_CONF2_SS_SHF      8
 #define MIPS_CONF2_SS          (_ULCAST_(15) << 8)
+#define MIPS_CONF2_L2B         (_ULCAST_(1) << 12)
 #define MIPS_CONF2_SU          (_ULCAST_(15) << 12)
 #define MIPS_CONF2_TA          (_ULCAST_(15) << 16)
 #define MIPS_CONF2_TL          (_ULCAST_(15) << 20)
@@ -549,8 +560,10 @@
 #define MIPS_CONF5_MRP         (_ULCAST_(1) << 3)
 #define MIPS_CONF5_LLB         (_ULCAST_(1) << 4)
 #define MIPS_CONF5_MVH         (_ULCAST_(1) << 5)
+#define MIPS_CONF5_VP          (_ULCAST_(1) << 7)
 #define MIPS_CONF5_FRE         (_ULCAST_(1) << 8)
 #define MIPS_CONF5_UFE         (_ULCAST_(1) << 9)
+#define MIPS_CONF5_L2C         (_ULCAST_(1) << 10)
 #define MIPS_CONF5_MSAEN       (_ULCAST_(1) << 27)
 #define MIPS_CONF5_EVA         (_ULCAST_(1) << 28)
 #define MIPS_CONF5_CV          (_ULCAST_(1) << 29)