dts: mtmips: add clock node for mt7628

[oweals/u-boot.git] / arch / mips / dts / brcm,bcm6328.dtsi

diff --git a/arch/mips/dts/brcm,bcm6328.dtsi b/arch/mips/dts/brcm,bcm6328.dtsi
index a99607574357bfd68a7cd0b5a9a537441defd3e2..350c0e903ba07284c35bd17c0bfde14a5a83c851 100644 (file)
--- a/arch/mips/dts/brcm,bcm6328.dtsi
+++ b/arch/mips/dts/brcm,bcm6328.dtsi
@@ -1,10 +1,10 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <dt-bindings/clock/bcm6328-clock.h>
+#include <dt-bindings/dma/bcm6328-dma.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/power-domain/bcm6328-power-domain.h>
 #include <dt-bindings/reset/bcm6328-reset.h>
@@ -13,6 +13,10 @@
 / {
        compatible = "brcm,bcm6328";
 
+       aliases {
+               spi0 = &spi;
+       };
+
        cpus {
                reg = <0x10000000 0x4>;
                #address-cells = <1>;
@@ -40,6 +44,12 @@
                #size-cells = <1>;
                u-boot,dm-pre-reloc;
 
+               hsspi_pll: hsspi-pll {
+                       compatible = "fixed-clock";
+                       #clock-cells = <0>;
+                       clock-frequency = <133333333>;
+               };
+
                periph_osc: periph-osc {
                        compatible = "fixed-clock";
                        #clock-cells = <0>;
@@ -114,6 +124,22 @@
                        status = "disabled";
                };
 
+               nand: nand-controller@10000200 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "brcm,nand-bcm6368",
+                                    "brcm,brcmnand-v2.2",
+                                    "brcm,brcmnand";
+                       reg-names = "nand",
+                                   "nand-cache",
+                                   "nand-int-base";
+                       reg = <0x10000200 0x180>,
+                             <0x10000400 0x200>,
+                             <0x100000b0 0x10>;
+
+                       status = "disabled";
+               };
+
                leds: led-controller@10000800 {
                        compatible = "brcm,bcm6328-leds";
                        reg = <0x10000800 0x24>;
@@ -123,16 +149,89 @@
                        status = "disabled";
                };
 
+               spi: spi@10001000 {
+                       compatible = "brcm,bcm6328-hsspi";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <0x10001000 0x600>;
+                       clocks = <&periph_clk BCM6328_CLK_HSSPI>, <&hsspi_pll>;
+                       clock-names = "hsspi", "pll";
+                       resets = <&periph_rst BCM6328_RST_SPI>;
+                       spi-max-frequency = <33333334>;
+                       num-cs = <3>;
+
+                       status = "disabled";
+               };
+
                periph_pwr: power-controller@10001848 {
                        compatible = "brcm,bcm6328-power-domain";
                        reg = <0x10001848 0x4>;
                        #power-domain-cells = <1>;
                };
 
+               ehci: usb-controller@10002500 {
+                       compatible = "brcm,bcm6328-ehci", "generic-ehci";
+                       reg = <0x10002500 0x100>;
+                       phys = <&usbh>;
+                       big-endian;
+
+                       status = "disabled";
+               };
+
+               ohci: usb-controller@10002600 {
+                       compatible = "brcm,bcm6328-ohci", "generic-ohci";
+                       reg = <0x10002600 0x100>;
+                       phys = <&usbh>;
+                       big-endian;
+
+                       status = "disabled";
+               };
+
+               usbh: usb-phy@10002700 {
+                       compatible = "brcm,bcm6328-usbh";
+                       reg = <0x10002700 0x38>;
+                       #phy-cells = <0>;
+                       clocks = <&periph_clk BCM6328_CLK_USBH>;
+                       clock-names = "usbh";
+                       power-domains = <&periph_pwr BCM6328_PWR_USBH>;
+                       resets = <&periph_rst BCM6328_RST_USBH>;
+
+                       status = "disabled";
+               };
+
                memory-controller@10003000 {
                        compatible = "brcm,bcm6328-mc";
                        reg = <0x10003000 0x864>;
                        u-boot,dm-pre-reloc;
                };
+
+               iudma: dma-controller@1000d800 {
+                       compatible = "brcm,bcm6368-iudma";
+                       reg = <0x1000d800 0x80>,
+                             <0x1000da00 0x80>,
+                             <0x1000dc00 0x80>;
+                       reg-names = "dma",
+                                   "dma-channels",
+                                   "dma-sram";
+                       #dma-cells = <1>;
+                       dma-channels = <8>;
+               };
+
+               enet: ethernet@10e00000 {
+                       compatible = "brcm,bcm6368-enet";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <0x10e00000 0x10000>;
+                       clocks = <&periph_clk BCM6328_CLK_ROBOSW>;
+                       resets = <&periph_rst BCM6328_RST_ENETSW>,
+                                <&periph_rst BCM6328_RST_EPHY>;
+                       dmas = <&iudma BCM6328_DMA_ENETSW_RX>,
+                              <&iudma BCM6328_DMA_ENETSW_TX>;
+                       dma-names = "rx",
+                                   "tx";
+                       brcm,num-ports = <5>;
+
+                       status = "disabled";
+               };
        };
 };