rockchip: px5: enable spl-fifo-mode for emmc for px5-evb

[oweals/u-boot.git] / arch / mips / Makefile

diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index 0b5dbb68fd76395bde1f0c5caf2b38bf8bed307b..af3f227436ee3b80440c5c7e08ead4ddf506efbe 100644 (file)
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -1,6 +1,4 @@
-#
-# SPDX-License-Identifier:     GPL-2.0+
-#
+# SPDX-License-Identifier: GPL-2.0+
 
 head-y := arch/mips/cpu/start.o
 
@@ -13,9 +11,12 @@ endif
 libs-y += arch/mips/cpu/
 libs-y += arch/mips/lib/
 
-machine-$(CONFIG_SOC_AU1X00) += au1x00
 machine-$(CONFIG_ARCH_ATH79) += ath79
+machine-$(CONFIG_ARCH_BMIPS) += bmips
+machine-$(CONFIG_ARCH_JZ47XX) += jz47xx
 machine-$(CONFIG_MACH_PIC32) += pic32
+machine-$(CONFIG_ARCH_MTMIPS) += mtmips
+machine-$(CONFIG_ARCH_MSCC) += mscc
 
 machdirs := $(patsubst %,arch/mips/mach-%/,$(machine-y))
 libs-y += $(machdirs)
@@ -34,6 +35,7 @@ arch-$(CONFIG_CPU_MIPS64_R6) += -march=mips64r6 -Wa,-mips64r6
 tune-$(CONFIG_MIPS_TUNE_4KC) += -mtune=4kc
 tune-$(CONFIG_MIPS_TUNE_14KC) += -mtune=14kc
 tune-$(CONFIG_MIPS_TUNE_24KC) += -mtune=24kc
+tune-$(CONFIG_MIPS_TUNE_34KC) += -mtune=34kc
 tune-$(CONFIG_MIPS_TUNE_74KC) += -mtune=74kc
 
 # Include default header files