arm: zynq: Move common ps7_init* initialization to arch code

[oweals/u-boot.git] / arch / arm / mach-zynq / include / mach / ps7_init_gpl.h

diff --git a/arch/arm/mach-zynq/include/mach/ps7_init_gpl.h b/arch/arm/mach-zynq/include/mach/ps7_init_gpl.h
index 6e30108b23f4463dd0b241cbdd90d07deea848f4..c7c716e7f2c408524f8c49634a3abf40ef3af63d 100644 (file)
--- a/arch/arm/mach-zynq/include/mach/ps7_init_gpl.h
+++ b/arch/arm/mach-zynq/include/mach/ps7_init_gpl.h
@@ -1,5 +1,6 @@
 /*
- * (c) Copyright 2010-2017 Xilinx, Inc. All rights reserved.
+ * (c) Copyright 2010-2014 Xilinx, Inc. All rights reserved.
+ * (c) Copyright 2016 Topic Embedded Products.
  *
  * SPDX-License-Identifier:    GPL-2.0+
  */
@@ -7,8 +8,33 @@
 #ifndef _ASM_ARCH_PS7_INIT_GPL_H
 #define _ASM_ARCH_PS7_INIT_GPL_H
 
+/* Opcode exit is 0 all the time */
+#define OPCODE_EXIT            0U
+#define OPCODE_MASKWRITE       0U
+#define OPCODE_MASKPOLL                1U
+#define OPCODE_MASKDELAY       2U
+#define OPCODE_ADDRESS_MASK    (~3U)
+
+/* Sentinel */
+#define EMIT_EXIT()                    OPCODE_EXIT
+/* Opcode is in lower 2 bits of address, address is always 4-byte aligned */
+#define EMIT_MASKWRITE(addr, mask, val)        OPCODE_MASKWRITE | addr, mask, val
+#define EMIT_MASKPOLL(addr, mask)      OPCODE_MASKPOLL | addr, mask
+#define EMIT_MASKDELAY(addr, mask)     OPCODE_MASKDELAY | addr, mask
+
+/* Returns codes of ps7_init* */
+#define PS7_INIT_SUCCESS               (0)
+#define PS7_INIT_CORRUPT               (1)
+#define PS7_INIT_TIMEOUT               (2)
+#define PS7_POLL_FAILED_DDR_INIT       (3)
+#define PS7_POLL_FAILED_DMA            (4)
+#define PS7_POLL_FAILED_PLL            (5)
+
 /* Called by spl.c */
 int ps7_init(void);
 int ps7_post_config(void);
 
+/* Defined in ps7_init_common.c */
+int ps7_config(unsigned long *ps7_config_init);
+
 #endif /* _ASM_ARCH_PS7_INIT_GPL_H */