ARM: uniphier: do not setup pins for System Bus on NAND boot mode

[oweals/u-boot.git] / arch / arm / mach-uniphier / boards.c

diff --git a/arch/arm/mach-uniphier/boards.c b/arch/arm/mach-uniphier/boards.c
index ed308f3ecba0d4c2efc839ea02f46de7a29ac859..79b1d2013a0e97c64f16729122acf44efc200d7a 100644 (file)
--- a/arch/arm/mach-uniphier/boards.c
+++ b/arch/arm/mach-uniphier/boards.c
@@ -1,5 +1,6 @@
 /*
- * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
+ * Copyright (C) 2015-2016 Socionext Inc.
+ *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
  *
  * SPDX-License-Identifier:    GPL-2.0+
  */
@@ -38,7 +39,6 @@ static const struct uniphier_board_data uniphier_sld3_data = {
 static const struct uniphier_board_data uniphier_ld4_data = {
        .dram_freq = 1600,
        .dram_nr_ch = 2,
-       .dram_ddr3plus = true,
        .dram_ch[0] = {
                .base = 0x80000000,
                .size = 0x10000000,
@@ -49,6 +49,7 @@ static const struct uniphier_board_data uniphier_ld4_data = {
                .size = 0x10000000,
                .width = 16,
        },
+       .flags = UNIPHIER_BD_DDR3PLUS,
 };
 #endif
 
@@ -90,7 +91,6 @@ static const struct uniphier_board_data uniphier_pro4_2g_data = {
 static const struct uniphier_board_data uniphier_sld8_data = {
        .dram_freq = 1333,
        .dram_nr_ch = 2,
-       .dram_ddr3plus = true,
        .dram_ch[0] = {
                .base = 0x80000000,
                .size = 0x10000000,
@@ -101,6 +101,7 @@ static const struct uniphier_board_data uniphier_sld8_data = {
                .size = 0x10000000,
                .width = 16,
        },
+       .flags = UNIPHIER_BD_DDR3PLUS,
 };
 #endif
 
@@ -183,6 +184,27 @@ static const struct uniphier_board_data uniphier_ld11_data = {
 #endif
 
 #if defined(CONFIG_ARCH_UNIPHIER_LD20)
+static const struct uniphier_board_data uniphier_ld20_ref_data = {
+       .dram_freq = 1866,
+       .dram_nr_ch = 3,
+       .dram_ch[0] = {
+               .base = 0x80000000,
+               .size = 0x40000000,
+               .width = 32,
+       },
+       .dram_ch[1] = {
+               .base = 0xc0000000,
+               .size = 0x40000000,
+               .width = 32,
+       },
+       .dram_ch[2] = {
+               .base = 0x100000000UL,
+               .size = 0x40000000,
+               .width = 32,
+       },
+       .flags = UNIPHIER_BD_BOARD_LD20_REF,
+};
+
 static const struct uniphier_board_data uniphier_ld20_data = {
        .dram_freq = 1866,
        .dram_nr_ch = 3,
@@ -201,6 +223,23 @@ static const struct uniphier_board_data uniphier_ld20_data = {
                .size = 0x40000000,
                .width = 32,
        },
+       .flags = UNIPHIER_BD_BOARD_LD20_GLOBAL,
+};
+
+static const struct uniphier_board_data uniphier_ld21_data = {
+       .dram_freq = 1866,
+       .dram_nr_ch = 2,
+       .dram_ch[0] = {
+               .base = 0x80000000,
+               .size = 0x20000000,
+               .width = 32,
+       },
+       .dram_ch[1] = {
+               .base = 0xc0000000,
+               .size = 0x40000000,
+               .width = 32,
+       },
+       .flags = UNIPHIER_BD_BOARD_LD21_GLOBAL,
 };
 #endif
 
@@ -237,6 +276,8 @@ static const struct uniphier_board_id uniphier_boards[] = {
        { "socionext,ph1-ld11", &uniphier_ld11_data, },
 #endif
 #if defined(CONFIG_ARCH_UNIPHIER_LD20)
+       { "socionext,ph1-ld21", &uniphier_ld21_data, },
+       { "socionext,ph1-ld20-ref", &uniphier_ld20_ref_data, },
        { "socionext,ph1-ld20", &uniphier_ld20_data, },
 #endif
 };