Merge branch 'master' of http://git.denx.de/u-boot-mmc

[oweals/u-boot.git] / arch / arm / mach-uniphier / boards.c

diff --git a/arch/arm/mach-uniphier/boards.c b/arch/arm/mach-uniphier/boards.c
index 5e98c3f33b770926c40766216c87e07629ae0888..79b1d2013a0e97c64f16729122acf44efc200d7a 100644 (file)
--- a/arch/arm/mach-uniphier/boards.c
+++ b/arch/arm/mach-uniphier/boards.c
@@ -1,5 +1,6 @@
 /*
- * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
+ * Copyright (C) 2015-2016 Socionext Inc.
+ *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
  *
  * SPDX-License-Identifier:    GPL-2.0+
  */
@@ -13,7 +14,7 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 #if defined(CONFIG_ARCH_UNIPHIER_SLD3)
-static const struct uniphier_board_data ph1_sld3_data = {
+static const struct uniphier_board_data uniphier_sld3_data = {
        .dram_freq = 1600,
        .dram_nr_ch = 3,
        .dram_ch[0] = {
@@ -35,10 +36,9 @@ static const struct uniphier_board_data ph1_sld3_data = {
 #endif
 
 #if defined(CONFIG_ARCH_UNIPHIER_LD4)
-static const struct uniphier_board_data ph1_ld4_data = {
+static const struct uniphier_board_data uniphier_ld4_data = {
        .dram_freq = 1600,
        .dram_nr_ch = 2,
-       .dram_ddr3plus = true,
        .dram_ch[0] = {
                .base = 0x80000000,
                .size = 0x10000000,
@@ -49,12 +49,13 @@ static const struct uniphier_board_data ph1_ld4_data = {
                .size = 0x10000000,
                .width = 16,
        },
+       .flags = UNIPHIER_BD_DDR3PLUS,
 };
 #endif
 
 #if defined(CONFIG_ARCH_UNIPHIER_PRO4)
 /* 1GB RAM board */
-static const struct uniphier_board_data ph1_pro4_data = {
+static const struct uniphier_board_data uniphier_pro4_data = {
        .dram_freq = 1600,
        .dram_nr_ch = 2,
        .dram_ch[0] = {
@@ -70,7 +71,7 @@ static const struct uniphier_board_data ph1_pro4_data = {
 };
 
 /* 2GB RAM board */
-static const struct uniphier_board_data ph1_pro4_2g_data = {
+static const struct uniphier_board_data uniphier_pro4_2g_data = {
        .dram_freq = 1600,
        .dram_nr_ch = 2,
        .dram_ch[0] = {
@@ -87,10 +88,9 @@ static const struct uniphier_board_data ph1_pro4_2g_data = {
 #endif
 
 #if defined(CONFIG_ARCH_UNIPHIER_SLD8)
-static const struct uniphier_board_data ph1_sld8_data = {
+static const struct uniphier_board_data uniphier_sld8_data = {
        .dram_freq = 1333,
        .dram_nr_ch = 2,
-       .dram_ddr3plus = true,
        .dram_ch[0] = {
                .base = 0x80000000,
                .size = 0x10000000,
@@ -101,11 +101,12 @@ static const struct uniphier_board_data ph1_sld8_data = {
                .size = 0x10000000,
                .width = 16,
        },
+       .flags = UNIPHIER_BD_DDR3PLUS,
 };
 #endif
 
 #if defined(CONFIG_ARCH_UNIPHIER_PRO5)
-static const struct uniphier_board_data ph1_pro5_data = {
+static const struct uniphier_board_data uniphier_pro5_data = {
        .dram_freq = 1866,
        .dram_nr_ch = 2,
        .dram_ch[0] = {
@@ -122,7 +123,7 @@ static const struct uniphier_board_data ph1_pro5_data = {
 #endif
 
 #if defined(CONFIG_ARCH_UNIPHIER_PXS2)
-static const struct uniphier_board_data proxstream2_data = {
+static const struct uniphier_board_data uniphier_pxs2_data = {
        .dram_freq = 2133,
        .dram_nr_ch = 3,
        .dram_ch[0] = {
@@ -144,7 +145,7 @@ static const struct uniphier_board_data proxstream2_data = {
 #endif
 
 #if defined(CONFIG_ARCH_UNIPHIER_LD6B)
-static const struct uniphier_board_data ph1_ld6b_data = {
+static const struct uniphier_board_data uniphier_ld6b_data = {
        .dram_freq = 1866,
        .dram_nr_ch = 3,
        .dram_ch[0] = {
@@ -165,6 +166,83 @@ static const struct uniphier_board_data ph1_ld6b_data = {
 };
 #endif
 
+#if defined(CONFIG_ARCH_UNIPHIER_LD11)
+static const struct uniphier_board_data uniphier_ld11_data = {
+       .dram_freq = 1600,
+       .dram_nr_ch = 2,
+       .dram_ch[0] = {
+               .base = 0x80000000,
+               .size = 0x20000000,
+               .width = 16,
+       },
+       .dram_ch[1] = {
+               .base = 0xa0000000,
+               .size = 0x20000000,
+               .width = 16,
+       },
+};
+#endif
+
+#if defined(CONFIG_ARCH_UNIPHIER_LD20)
+static const struct uniphier_board_data uniphier_ld20_ref_data = {
+       .dram_freq = 1866,
+       .dram_nr_ch = 3,
+       .dram_ch[0] = {
+               .base = 0x80000000,
+               .size = 0x40000000,
+               .width = 32,
+       },
+       .dram_ch[1] = {
+               .base = 0xc0000000,
+               .size = 0x40000000,
+               .width = 32,
+       },
+       .dram_ch[2] = {
+               .base = 0x100000000UL,
+               .size = 0x40000000,
+               .width = 32,
+       },
+       .flags = UNIPHIER_BD_BOARD_LD20_REF,
+};
+
+static const struct uniphier_board_data uniphier_ld20_data = {
+       .dram_freq = 1866,
+       .dram_nr_ch = 3,
+       .dram_ch[0] = {
+               .base = 0x80000000,
+               .size = 0x40000000,
+               .width = 32,
+       },
+       .dram_ch[1] = {
+               .base = 0xc0000000,
+               .size = 0x40000000,
+               .width = 32,
+       },
+       .dram_ch[2] = {
+               .base = 0x100000000UL,
+               .size = 0x40000000,
+               .width = 32,
+       },
+       .flags = UNIPHIER_BD_BOARD_LD20_GLOBAL,
+};
+
+static const struct uniphier_board_data uniphier_ld21_data = {
+       .dram_freq = 1866,
+       .dram_nr_ch = 2,
+       .dram_ch[0] = {
+               .base = 0x80000000,
+               .size = 0x20000000,
+               .width = 32,
+       },
+       .dram_ch[1] = {
+               .base = 0xc0000000,
+               .size = 0x40000000,
+               .width = 32,
+       },
+       .flags = UNIPHIER_BD_BOARD_LD21_GLOBAL,
+};
+#endif
+
 struct uniphier_board_id {
        const char *compatible;
        const struct uniphier_board_data *param;
@@ -172,27 +250,35 @@ struct uniphier_board_id {
 
 static const struct uniphier_board_id uniphier_boards[] = {
 #if defined(CONFIG_ARCH_UNIPHIER_SLD3)
-       { "socionext,ph1-sld3", &ph1_sld3_data, },
+       { "socionext,ph1-sld3", &uniphier_sld3_data, },
 #endif
 #if defined(CONFIG_ARCH_UNIPHIER_LD4)
-       { "socionext,ph1-ld4", &ph1_ld4_data, },
+       { "socionext,ph1-ld4", &uniphier_ld4_data, },
 #endif
 #if defined(CONFIG_ARCH_UNIPHIER_PRO4)
-       { "socionext,ph1-pro4-ace", &ph1_pro4_2g_data, },
-       { "socionext,ph1-pro4-sanji", &ph1_pro4_2g_data, },
-       { "socionext,ph1-pro4", &ph1_pro4_data, },
+       { "socionext,ph1-pro4-ace", &uniphier_pro4_2g_data, },
+       { "socionext,ph1-pro4-sanji", &uniphier_pro4_2g_data, },
+       { "socionext,ph1-pro4", &uniphier_pro4_data, },
 #endif
 #if defined(CONFIG_ARCH_UNIPHIER_SLD8)
-       { "socionext,ph1-sld8", &ph1_sld8_data, },
+       { "socionext,ph1-sld8", &uniphier_sld8_data, },
 #endif
 #if defined(CONFIG_ARCH_UNIPHIER_PRO5)
-       { "socionext,ph1-pro5", &ph1_pro5_data, },
+       { "socionext,ph1-pro5", &uniphier_pro5_data, },
 #endif
 #if defined(CONFIG_ARCH_UNIPHIER_PXS2)
-       { "socionext,proxstream2", &proxstream2_data, },
+       { "socionext,proxstream2", &uniphier_pxs2_data, },
 #endif
 #if defined(CONFIG_ARCH_UNIPHIER_LD6B)
-       { "socionext,ph1-ld6b", &ph1_ld6b_data, },
+       { "socionext,ph1-ld6b", &uniphier_ld6b_data, },
+#endif
+#if defined(CONFIG_ARCH_UNIPHIER_LD11)
+       { "socionext,ph1-ld11", &uniphier_ld11_data, },
+#endif
+#if defined(CONFIG_ARCH_UNIPHIER_LD20)
+       { "socionext,ph1-ld21", &uniphier_ld21_data, },
+       { "socionext,ph1-ld20-ref", &uniphier_ld20_ref_data, },
+       { "socionext,ph1-ld20", &uniphier_ld20_data, },
 #endif
 };