ARM: uniphier: remove sLD3 SoC support

[oweals/u-boot.git] / arch / arm / mach-uniphier / arm32 / debug_ll.S

diff --git a/arch/arm/mach-uniphier/arm32/debug_ll.S b/arch/arm/mach-uniphier/arm32/debug_ll.S
index a70954cbee711ba976fb24a39804d453b268194b..b39899e6231ee20a849cd07f729effde561bcd4c 100644 (file)
--- a/arch/arm/mach-uniphier/arm32/debug_ll.S
+++ b/arch/arm/mach-uniphier/arm32/debug_ll.S
@@ -26,31 +26,10 @@ ENTRY(debug_ll_init)
        and             r1, r1, #SG_REVISION_TYPE_MASK
        mov             r1, r1, lsr #SG_REVISION_TYPE_SHIFT
 
-#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD3)
-#define PH1_SLD3_UART_CLK              36864000
-       cmp             r1, #0x25
-       bne             ph1_sld3_end
-
-       sg_set_pinsel   64, 1, 4, 4, r0, r1     @ TXD0 -> TXD0
-
-       ldr             r0, =BCSCR5
-       ldr             r1, =0x24440000
-       str             r1, [r0]
-
-       ldr             r0, =SC_CLKCTRL
-       ldr             r1, [r0]
-       orr             r1, r1, #SC_CLKCTRL_CEN_PERI
-       str             r1, [r0]
-
-       ldr             r3, =DIV_ROUND(PH1_SLD3_UART_CLK, 16 * BAUDRATE)
-
-       b               init_uart
-ph1_sld3_end:
-#endif
-#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD4)
-#define PH1_LD4_UART_CLK               36864000
+#if defined(CONFIG_ARCH_UNIPHIER_LD4)
+#define UNIPHIER_LD4_UART_CLK          36864000
        cmp             r1, #0x26
-       bne             ph1_ld4_end
+       bne             ld4_end
 
        ldr             r0, =SG_IECTRL
        ldr             r1, [r0]
@@ -59,15 +38,15 @@ ph1_sld3_end:
 
        sg_set_pinsel   88, 1, 8, 4, r0, r1     @ HSDOUT6 -> TXD0
 
-       ldr             r3, =DIV_ROUND(PH1_LD4_UART_CLK, 16 * BAUDRATE)
+       ldr             r3, =DIV_ROUND(UNIPHIER_LD4_UART_CLK, 16 * BAUDRATE)
 
        b               init_uart
-ph1_ld4_end:
+ld4_end:
 #endif
-#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO4)
-#define PH1_PRO4_UART_CLK              73728000
+#if defined(CONFIG_ARCH_UNIPHIER_PRO4)
+#define UNIPHIER_PRO4_UART_CLK         73728000
        cmp             r1, #0x28
-       bne             ph1_pro4_end
+       bne             pro4_end
 
        sg_set_pinsel   128, 0, 4, 8, r0, r1    @ TXD0 -> TXD0
 
@@ -80,15 +59,15 @@ ph1_ld4_end:
        orr             r1, r1, #SC_CLKCTRL_CEN_PERI
        str             r1, [r0]
 
-       ldr             r3, =DIV_ROUND(PH1_PRO4_UART_CLK, 16 * BAUDRATE)
+       ldr             r3, =DIV_ROUND(UNIPHIER_PRO4_UART_CLK, 16 * BAUDRATE)
 
        b               init_uart
-ph1_pro4_end:
+pro4_end:
 #endif
-#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD8)
-#define PH1_SLD8_UART_CLK              80000000
+#if defined(CONFIG_ARCH_UNIPHIER_SLD8)
+#define UNIPHIER_SLD8_UART_CLK         80000000
        cmp             r1, #0x29
-       bne             ph1_sld8_end
+       bne             sld8_end
 
        ldr             r0, =SG_IECTRL
        ldr             r1, [r0]
@@ -97,15 +76,15 @@ ph1_pro4_end:
 
        sg_set_pinsel   70, 3, 8, 4, r0, r1     @ HSDOUT0 -> TXD0
 
-       ldr             r3, =DIV_ROUND(PH1_SLD8_UART_CLK, 16 * BAUDRATE)
+       ldr             r3, =DIV_ROUND(UNIPHIER_SLD8_UART_CLK, 16 * BAUDRATE)
 
        b               init_uart
-ph1_sld8_end:
+sld8_end:
 #endif
-#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO5)
-#define PH1_PRO5_UART_CLK              73728000
+#if defined(CONFIG_ARCH_UNIPHIER_PRO5)
+#define UNIPHIER_PRO5_UART_CLK         73728000
        cmp             r1, #0x2A
-       bne             ph1_pro5_end
+       bne             pro5_end
 
        sg_set_pinsel   47, 0, 4, 8, r0, r1     @ TXD0 -> TXD0
        sg_set_pinsel   49, 0, 4, 8, r0, r1     @ TXD1 -> TXD1
@@ -121,15 +100,15 @@ ph1_sld8_end:
        orr             r1, r1, #SC_CLKCTRL_CEN_PERI
        str             r1, [r0]
 
-       ldr             r3, =DIV_ROUND(PH1_PRO5_UART_CLK, 16 * BAUDRATE)
+       ldr             r3, =DIV_ROUND(UNIPHIER_PRO5_UART_CLK, 16 * BAUDRATE)
 
        b               init_uart
-ph1_pro5_end:
+pro5_end:
 #endif
-#if defined(CONFIG_ARCH_UNIPHIER_PROXSTREAM2)
-#define PROXSTREAM2_UART_CLK           88900000
+#if defined(CONFIG_ARCH_UNIPHIER_PXS2)
+#define UNIPHIER_PXS2_UART_CLK         88900000
        cmp             r1, #0x2E
-       bne             proxstream2_end
+       bne             pxs2_end
 
        ldr             r0, =SG_IECTRL
        ldr             r1, [r0]
@@ -146,15 +125,15 @@ ph1_pro5_end:
        orr             r1, r1, #SC_CLKCTRL_CEN_PERI
        str             r1, [r0]
 
-       ldr             r3, =DIV_ROUND(PROXSTREAM2_UART_CLK, 16 * BAUDRATE)
+       ldr             r3, =DIV_ROUND(UNIPHIER_PXS2_UART_CLK, 16 * BAUDRATE)
 
        b               init_uart
-proxstream2_end:
+pxs2_end:
 #endif
-#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD6B)
-#define PH1_LD6B_UART_CLK              88900000
+#if defined(CONFIG_ARCH_UNIPHIER_LD6B)
+#define UNIPHIER_LD6B_UART_CLK         88900000
        cmp             r1, #0x2F
-       bne             ph1_ld6b_end
+       bne             ld6b_end
 
        ldr             r0, =SG_IECTRL
        ldr             r1, [r0]
@@ -170,11 +149,12 @@ proxstream2_end:
        orr             r1, r1, #SC_CLKCTRL_CEN_PERI
        str             r1, [r0]
 
-       ldr             r3, =DIV_ROUND(PH1_LD6B_UART_CLK, 16 * BAUDRATE)
+       ldr             r3, =DIV_ROUND(UNIPHIER_LD6B_UART_CLK, 16 * BAUDRATE)
 
        b               init_uart
-ph1_ld6b_end:
+ld6b_end:
 #endif
+       mov             pc, lr
 
 init_uart:
        addruart        r0, r1, r2