Merge https://gitlab.denx.de/u-boot/custodians/u-boot-mpc85xx

[oweals/u-boot.git] / arch / arm / mach-tegra / tegra210 / clock.c

diff --git a/arch/arm/mach-tegra/tegra210/clock.c b/arch/arm/mach-tegra/tegra210/clock.c
index f0052e7934a13b5fbea4b699266694357cf0d1ba..b240860f08cf30e8c74dbdcf0f16dd701dc1978b 100644 (file)
--- a/arch/arm/mach-tegra/tegra210/clock.c
+++ b/arch/arm/mach-tegra/tegra210/clock.c
@@ -1,8 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * (C) Copyright 2013-2015
  * NVIDIA Corporation <www.nvidia.com>
- *
- * SPDX-License-Identifier:     GPL-2.0+
  */
 
 /* Tegra210 Clock control functions */
@@ -41,7 +40,7 @@ enum clock_type_id {
        CLOCK_TYPE_PDCT,
        CLOCK_TYPE_ACPT,
        CLOCK_TYPE_ASPTE,
-       CLOCK_TYPE_PMDACD2T,
+       CLOCK_TYPE_PDD2T,
        CLOCK_TYPE_PCST,
        CLOCK_TYPE_DP,
 
@@ -98,8 +97,8 @@ static enum clock_id clock_source[CLOCK_TYPE_COUNT][CLOCK_MAX_MUX+1] = {
        { CLK(AUDIO),   CLK(SFROM32KHZ),        CLK(PERIPH),    CLK(OSC),
                CLK(EPCI),      CLK(NONE),      CLK(NONE),      CLK(NONE),
                MASK_BITS_31_29},
-       { CLK(PERIPH),  CLK(MEMORY),    CLK(DISPLAY),   CLK(AUDIO),
-               CLK(CGENERAL),  CLK(DISPLAY2),  CLK(OSC),       CLK(NONE),
+       { CLK(PERIPH),  CLK(NONE),      CLK(DISPLAY),   CLK(NONE),
+               CLK(NONE),      CLK(DISPLAY2),  CLK(OSC),       CLK(NONE),
                MASK_BITS_31_29},
        { CLK(PERIPH),  CLK(CGENERAL),  CLK(SFROM32KHZ),        CLK(OSC),
                CLK(NONE),      CLK(NONE),      CLK(NONE),      CLK(NONE),
@@ -175,8 +174,8 @@ static enum clock_type_id clock_periph_type[PERIPHC_COUNT] = {
        TYPE(PERIPHC_0bh,       CLOCK_TYPE_NONE),
        TYPE(PERIPHC_0ch,       CLOCK_TYPE_NONE),
        TYPE(PERIPHC_SBC1,      CLOCK_TYPE_PC2CC3M_T),
-       TYPE(PERIPHC_DISP1,     CLOCK_TYPE_PMDACD2T),
-       TYPE(PERIPHC_DISP2,     CLOCK_TYPE_PMDACD2T),
+       TYPE(PERIPHC_DISP1,     CLOCK_TYPE_PDD2T),
+       TYPE(PERIPHC_DISP2,     CLOCK_TYPE_PDD2T),
 
        /* 0x10 */
        TYPE(PERIPHC_10h,       CLOCK_TYPE_NONE),
@@ -732,6 +731,51 @@ u32 *get_periph_source_reg(enum periph_id periph_id)
        return &clkrst->crc_clk_src_y[internal_id];
 }
 
+int get_periph_clock_info(enum periph_id periph_id, int *mux_bits,
+                         int *divider_bits, int *type)
+{
+       enum periphc_internal_id internal_id;
+
+       if (!clock_periph_id_isvalid(periph_id))
+               return -1;
+
+       internal_id = periph_id_to_internal_id[periph_id];
+       if (!periphc_internal_id_isvalid(internal_id))
+               return -1;
+
+       *type = clock_periph_type[internal_id];
+       if (!clock_type_id_isvalid(*type))
+               return -1;
+
+       *mux_bits = clock_source[*type][CLOCK_MAX_MUX];
+
+       if (*type == CLOCK_TYPE_PC2CC3M_T16)
+               *divider_bits = 16;
+       else
+               *divider_bits = 8;
+
+       return 0;
+}
+
+enum clock_id get_periph_clock_id(enum periph_id periph_id, int source)
+{
+       enum periphc_internal_id internal_id;
+       int type;
+
+       if (!clock_periph_id_isvalid(periph_id))
+               return CLOCK_ID_NONE;
+
+       internal_id = periph_id_to_internal_id[periph_id];
+       if (!periphc_internal_id_isvalid(internal_id))
+               return CLOCK_ID_NONE;
+
+       type = clock_periph_type[internal_id];
+       if (!clock_type_id_isvalid(type))
+               return CLOCK_ID_NONE;
+
+       return clock_source[type][source];
+}
+
 /**
  * Given a peripheral ID and the required source clock, this returns which
  * value should be programmed into the source mux for that peripheral.
@@ -748,23 +792,10 @@ int get_periph_clock_source(enum periph_id periph_id,
        enum clock_id parent, int *mux_bits, int *divider_bits)
 {
        enum clock_type_id type;
-       enum periphc_internal_id internal_id;
-       int mux;
-
-       assert(clock_periph_id_isvalid(periph_id));
-
-       internal_id = INTERNAL_ID(periph_id_to_internal_id[periph_id]);
-       assert(periphc_internal_id_isvalid(internal_id));
-
-       type = clock_periph_type[internal_id];
-       assert(clock_type_id_isvalid(type));
+       int mux, err;
 
-       *mux_bits = clock_source[type][CLOCK_MAX_MUX];
-
-       if (type == CLOCK_TYPE_PC2CC3M_T16)
-               *divider_bits = 16;
-       else
-               *divider_bits = 8;
+       err = get_periph_clock_info(periph_id, mux_bits, divider_bits, &type);
+       assert(!err);
 
        for (mux = 0; mux < CLOCK_MAX_MUX; mux++)
                if (clock_source[type][mux] == parent)
@@ -1225,3 +1256,25 @@ int tegra_plle_enable(void)
 
        return 0;
 }
+
+struct periph_clk_init periph_clk_init_table[] = {
+       { PERIPH_ID_SBC1, CLOCK_ID_PERIPH },
+       { PERIPH_ID_SBC2, CLOCK_ID_PERIPH },
+       { PERIPH_ID_SBC3, CLOCK_ID_PERIPH },
+       { PERIPH_ID_SBC4, CLOCK_ID_PERIPH },
+       { PERIPH_ID_SBC5, CLOCK_ID_PERIPH },
+       { PERIPH_ID_SBC6, CLOCK_ID_PERIPH },
+       { PERIPH_ID_HOST1X, CLOCK_ID_PERIPH },
+       { PERIPH_ID_SDMMC1, CLOCK_ID_PERIPH },
+       { PERIPH_ID_SDMMC2, CLOCK_ID_PERIPH },
+       { PERIPH_ID_SDMMC3, CLOCK_ID_PERIPH },
+       { PERIPH_ID_SDMMC4, CLOCK_ID_PERIPH },
+       { PERIPH_ID_PWM, CLOCK_ID_SFROM32KHZ },
+       { PERIPH_ID_I2C1, CLOCK_ID_PERIPH },
+       { PERIPH_ID_I2C2, CLOCK_ID_PERIPH },
+       { PERIPH_ID_I2C3, CLOCK_ID_PERIPH },
+       { PERIPH_ID_I2C4, CLOCK_ID_PERIPH },
+       { PERIPH_ID_I2C5, CLOCK_ID_PERIPH },
+       { PERIPH_ID_I2C6, CLOCK_ID_PERIPH },
+       { -1, },
+};