drivers: usb: host: Add BRCM xHCI driver

[oweals/u-boot.git] / arch / arm / mach-stm32mp / cpu.c

diff --git a/arch/arm/mach-stm32mp/cpu.c b/arch/arm/mach-stm32mp/cpu.c
index 305ea6dd643fb532e38ca7e229a75eec966765ed..ea0bd94605b77eac27a2045bfd5ca0403e2046fe 100644 (file)
--- a/arch/arm/mach-stm32mp/cpu.c
+++ b/arch/arm/mach-stm32mp/cpu.c
@@ -4,8 +4,9 @@
  */
 #include <common.h>
 #include <clk.h>
+#include <cpu_func.h>
 #include <debug_uart.h>
-#include <environment.h>
+#include <env.h>
 #include <misc.h>
 #include <asm/io.h>
 #include <asm/arch/stm32.h>
@@ -18,6 +19,7 @@
 #define RCC_DBGCFGR            (STM32_RCC_BASE + 0x080C)
 #define RCC_BDCR               (STM32_RCC_BASE + 0x0140)
 #define RCC_MP_APB5ENSETR      (STM32_RCC_BASE + 0x0208)
+#define RCC_MP_AHB5ENSETR      (STM32_RCC_BASE + 0x0210)
 #define RCC_BDCR_VSWRST                BIT(31)
 #define RCC_BDCR_RTCSRC                GENMASK(17, 16)
 #define RCC_DBGCFGR_DBGCKEN    BIT(8)
@@ -33,7 +35,9 @@
 #define TAMP_CR1               (STM32_TAMP_BASE + 0x00)
 
 #define PWR_CR1                        (STM32_PWR_BASE + 0x00)
+#define PWR_MCUCR              (STM32_PWR_BASE + 0x14)
 #define PWR_CR1_DBP            BIT(8)
+#define PWR_MCUCR_SBF          BIT(6)
 
 /* DBGMCU register */
 #define DBGMCU_IDC             (STM32_DBGMCU_BASE + 0x00)
@@ -44,6 +48,9 @@
 #define DBGMCU_IDC_REV_ID_MASK GENMASK(31, 16)
 #define DBGMCU_IDC_REV_ID_SHIFT        16
 
+/* GPIOZ registers */
+#define GPIOZ_SECCFGR          0x54004030
+
 /* boot interface from Bootrom
  * - boot instance = bit 31:16
  * - boot device = bit 15:0
@@ -74,11 +81,6 @@
 #define PKG_SHIFT      27
 #define PKG_MASK       GENMASK(2, 0)
 
-#define PKG_AA_LBGA448 4
-#define PKG_AB_LBGA354 3
-#define PKG_AC_TFBGA361        2
-#define PKG_AD_TFBGA257        1
-
 #if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)
 #ifndef CONFIG_STM32MP1_TRUSTED
 static void security_init(void)
@@ -135,6 +137,10 @@ static void security_init(void)
         * Bit 16 ITAMP1E: RTC power domain supply monitoring
         */
        writel(0x0, TAMP_CR1);
+
+       /* GPIOZ: deactivate the security */
+       writel(BIT(0), RCC_MP_AHB5ENSETR);
+       writel(0x0, GPIOZ_SECCFGR);
 }
 #endif /* CONFIG_STM32MP1_TRUSTED */
 
@@ -202,6 +208,11 @@ int arch_cpu_init(void)
        security_init();
        update_bootmode();
 #endif
+       /* Reset Coprocessor state unless it wakes up from Standby power mode */
+       if (!(readl(PWR_MCUCR) & PWR_MCUCR_SBF)) {
+               writel(TAMP_COPRO_STATE_OFF, TAMP_COPRO_STATE);
+               writel(0, TAMP_COPRO_RSC_TBL_ADDRESS);
+       }
 #endif
 
        boot_mode = get_bootmode();
@@ -269,7 +280,7 @@ u32 get_cpu_type(void)
 }
 
 /* Get Package options from OTP */
-static u32 get_cpu_package(void)
+u32 get_cpu_package(void)
 {
        return get_otp(BSEC_OTP_PKG, PKG_SHIFT, PKG_MASK);
 }
@@ -331,6 +342,9 @@ int print_cpuinfo(void)
        case CPU_REVB:
                cpu_r = "B";
                break;
+       case CPU_REVZ:
+               cpu_r = "Z";
+               break;
        default:
                cpu_r = "?";
                break;
@@ -358,7 +372,7 @@ static void setup_boot_mode(void)
        u32 boot_ctx = readl(TAMP_BOOT_CONTEXT);
        u32 boot_mode =
                (boot_ctx & TAMP_BOOT_MODE_MASK) >> TAMP_BOOT_MODE_SHIFT;
-       int instance = (boot_mode & TAMP_BOOT_INSTANCE_MASK) - 1;
+       unsigned int instance = (boot_mode & TAMP_BOOT_INSTANCE_MASK) - 1;
        u32 forced_mode = (boot_ctx & TAMP_BOOT_FORCED_MASK);
        struct udevice *dev;
        int alias;
@@ -445,7 +459,7 @@ static void setup_boot_mode(void)
  * If there is no MAC address in the environment, then it will be initialized
  * (silently) from the value in the OTP.
  */
-static int setup_mac_address(void)
+__weak int setup_mac_address(void)
 {
 #if defined(CONFIG_NET)
        int ret;
@@ -464,7 +478,7 @@ static int setup_mac_address(void)
        if (ret)
                return ret;
 
-       ret = misc_read(dev, BSEC_OTP_MAC * 4 + STM32_BSEC_OTP_OFFSET,
+       ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_MAC),
                        otp, sizeof(otp));
        if (ret < 0)
                return ret;
@@ -473,7 +487,7 @@ static int setup_mac_address(void)
                enetaddr[i] = ((uint8_t *)&otp)[i];
 
        if (!is_valid_ethaddr(enetaddr)) {
-               pr_err("invalid MAC address in OTP %pM", enetaddr);
+               pr_err("invalid MAC address in OTP %pM\n", enetaddr);
                return -EINVAL;
        }
        pr_debug("OTP MAC address = %pM\n", enetaddr);
@@ -502,12 +516,12 @@ static int setup_serial_number(void)
        if (ret)
                return ret;
 
-       ret = misc_read(dev, BSEC_OTP_SERIAL * 4 + STM32_BSEC_OTP_OFFSET,
+       ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_SERIAL),
                        otp, sizeof(otp));
        if (ret < 0)
                return ret;
 
-       sprintf(serial_string, "%08x%08x%08x", otp[0], otp[1], otp[2]);
+       sprintf(serial_string, "%08X%08X%08X", otp[0], otp[1], otp[2]);
        env_set("serial#", serial_string);
 
        return 0;